Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 2 | /* |
Patrice Chotard | 9e21624 | 2017-10-23 09:53:57 +0200 | [diff] [blame] | 3 | * Copyright (C) 2017, STMicroelectronics - All Rights Reserved |
Patrice Chotard | 5d9950d | 2020-12-02 18:47:30 +0100 | [diff] [blame] | 4 | * Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics. |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Simon Glass | 1d91ba7 | 2019-11-14 12:57:37 -0700 | [diff] [blame] | 8 | #include <cpu_func.h> |
Simon Glass | 9758973 | 2020-05-10 11:40:02 -0600 | [diff] [blame] | 9 | #include <init.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 10 | #include <asm/cache.h> |
Patrice Chotard | aecc94c | 2017-09-05 11:04:27 +0200 | [diff] [blame] | 11 | #include <linux/usb/otg.h> |
| 12 | #include <dwc3-sti-glue.h> |
| 13 | #include <dwc3-uboot.h> |
| 14 | #include <usb.h> |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 15 | |
| 16 | DECLARE_GLOBAL_DATA_PTR; |
| 17 | |
| 18 | int dram_init(void) |
| 19 | { |
| 20 | gd->ram_size = PHYS_SDRAM_1_SIZE; |
| 21 | return 0; |
| 22 | } |
| 23 | |
Simon Glass | 2f949c3 | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 24 | int dram_init_banksize(void) |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 25 | { |
| 26 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
| 27 | gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; |
Simon Glass | 2f949c3 | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 28 | |
| 29 | return 0; |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 30 | } |
| 31 | |
Trevor Woerner | 43ec7e0 | 2019-05-03 09:41:00 -0400 | [diff] [blame] | 32 | #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) |
Patrice Chotard | 411b3fc | 2017-03-20 15:21:36 +0100 | [diff] [blame] | 33 | void enable_caches(void) |
| 34 | { |
| 35 | /* Enable D-cache. I-cache is already enabled in start.S */ |
| 36 | dcache_enable(); |
| 37 | } |
| 38 | #endif |
| 39 | |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 40 | int board_init(void) |
| 41 | { |
| 42 | return 0; |
| 43 | } |
Patrice Chotard | aecc94c | 2017-09-05 11:04:27 +0200 | [diff] [blame] | 44 | |
| 45 | #ifdef CONFIG_USB_DWC3 |
| 46 | static struct dwc3_device dwc3_device_data = { |
| 47 | .maximum_speed = USB_SPEED_HIGH, |
| 48 | .dr_mode = USB_DR_MODE_PERIPHERAL, |
| 49 | .index = 0, |
| 50 | }; |
| 51 | |
| 52 | int usb_gadget_handle_interrupts(int index) |
| 53 | { |
| 54 | dwc3_uboot_handle_interrupt(index); |
| 55 | return 0; |
| 56 | } |
| 57 | |
| 58 | int board_usb_init(int index, enum usb_init_type init) |
| 59 | { |
| 60 | int node; |
| 61 | const void *blob = gd->fdt_blob; |
| 62 | |
| 63 | /* find the snps,dwc3 node */ |
| 64 | node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3"); |
| 65 | |
| 66 | dwc3_device_data.base = fdtdec_get_addr(blob, node, "reg"); |
| 67 | |
| 68 | return dwc3_uboot_init(&dwc3_device_data); |
| 69 | } |
| 70 | |
| 71 | int board_usb_cleanup(int index, enum usb_init_type init) |
| 72 | { |
| 73 | dwc3_uboot_exit(index); |
| 74 | return 0; |
| 75 | } |
| 76 | |
| 77 | int g_dnl_board_usb_cable_connected(void) |
| 78 | { |
| 79 | return 1; |
| 80 | } |
| 81 | #endif |