Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2001, 2002, 2003 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * Keith Outwater, keith_outwater@mvis.com` |
| 5 | * Steven Scholz, steven.scholz@imc-berlin.de |
| 6 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | /* |
| 11 | * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim) |
| 12 | * DS1374 Real Time Clock (RTC). |
| 13 | * |
| 14 | * based on ds1337.c |
| 15 | */ |
| 16 | |
| 17 | #include <common.h> |
| 18 | #include <command.h> |
| 19 | #include <rtc.h> |
| 20 | #include <i2c.h> |
| 21 | |
Michal Simek | c3e6c55 | 2008-07-14 19:45:37 +0200 | [diff] [blame] | 22 | #if defined(CONFIG_CMD_DATE) |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 23 | |
| 24 | /*---------------------------------------------------------------------*/ |
| 25 | #undef DEBUG_RTC |
| 26 | #define DEBUG_RTC |
| 27 | |
| 28 | #ifdef DEBUG_RTC |
| 29 | #define DEBUGR(fmt,args...) printf(fmt ,##args) |
| 30 | #else |
| 31 | #define DEBUGR(fmt,args...) |
| 32 | #endif |
| 33 | /*---------------------------------------------------------------------*/ |
| 34 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 35 | #ifndef CONFIG_SYS_I2C_RTC_ADDR |
| 36 | # define CONFIG_SYS_I2C_RTC_ADDR 0x68 |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 37 | #endif |
| 38 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 39 | #if defined(CONFIG_RTC_DS1374) && (CONFIG_SYS_I2C_SPEED > 400000) |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 40 | # error The DS1374 is specified up to 400kHz in fast mode! |
| 41 | #endif |
| 42 | |
| 43 | /* |
| 44 | * RTC register addresses |
| 45 | */ |
| 46 | #define RTC_TOD_CNT_BYTE0_ADDR 0x00 /* TimeOfDay */ |
| 47 | #define RTC_TOD_CNT_BYTE1_ADDR 0x01 |
| 48 | #define RTC_TOD_CNT_BYTE2_ADDR 0x02 |
| 49 | #define RTC_TOD_CNT_BYTE3_ADDR 0x03 |
| 50 | |
| 51 | #define RTC_WD_ALM_CNT_BYTE0_ADDR 0x04 |
| 52 | #define RTC_WD_ALM_CNT_BYTE1_ADDR 0x05 |
| 53 | #define RTC_WD_ALM_CNT_BYTE2_ADDR 0x06 |
| 54 | |
| 55 | #define RTC_CTL_ADDR 0x07 /* RTC-CoNTrol-register */ |
| 56 | #define RTC_SR_ADDR 0x08 /* RTC-StatusRegister */ |
| 57 | #define RTC_TCS_DS_ADDR 0x09 /* RTC-TrickleChargeSelect DiodeSelect-register */ |
| 58 | |
| 59 | #define RTC_CTL_BIT_AIE (1<<0) /* Bit 0 - Alarm Interrupt enable */ |
| 60 | #define RTC_CTL_BIT_RS1 (1<<1) /* Bit 1/2 - Rate Select square wave output */ |
| 61 | #define RTC_CTL_BIT_RS2 (1<<2) /* Bit 2/2 - Rate Select square wave output */ |
| 62 | #define RTC_CTL_BIT_WDSTR (1<<3) /* Bit 3 - Watchdog Reset Steering */ |
| 63 | #define RTC_CTL_BIT_BBSQW (1<<4) /* Bit 4 - Battery-Backed Square-Wave */ |
| 64 | #define RTC_CTL_BIT_WD_ALM (1<<5) /* Bit 5 - Watchdoc/Alarm Counter Select */ |
| 65 | #define RTC_CTL_BIT_WACE (1<<6) /* Bit 6 - Watchdog/Alarm Counter Enable WACE*/ |
| 66 | #define RTC_CTL_BIT_EN_OSC (1<<7) /* Bit 7 - Enable Oscilator */ |
| 67 | |
| 68 | #define RTC_SR_BIT_AF 0x01 /* Bit 0 = Alarm Flag */ |
| 69 | #define RTC_SR_BIT_OSF 0x80 /* Bit 7 - Osc Stop Flag */ |
| 70 | |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 71 | const char RtcTodAddr[] = { |
| 72 | RTC_TOD_CNT_BYTE0_ADDR, |
| 73 | RTC_TOD_CNT_BYTE1_ADDR, |
| 74 | RTC_TOD_CNT_BYTE2_ADDR, |
| 75 | RTC_TOD_CNT_BYTE3_ADDR |
| 76 | }; |
| 77 | |
| 78 | static uchar rtc_read (uchar reg); |
York Sun | 4a59809 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 79 | static void rtc_write(uchar reg, uchar val, bool set); |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 80 | static void rtc_write_raw (uchar reg, uchar val); |
| 81 | |
| 82 | /* |
| 83 | * Get the current time from the RTC |
| 84 | */ |
Yuri Tikhonov | 9bacd94 | 2008-03-20 17:56:04 +0300 | [diff] [blame] | 85 | int rtc_get (struct rtc_time *tm){ |
| 86 | int rel = 0; |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 87 | unsigned long time1, time2; |
| 88 | unsigned int limit; |
| 89 | unsigned char tmp; |
| 90 | unsigned int i; |
| 91 | |
| 92 | /* |
| 93 | * Since the reads are being performed one byte at a time, |
Wolfgang Denk | ebd3deb | 2006-04-16 10:51:58 +0200 | [diff] [blame] | 94 | * there is a chance that a carry will occur during the read. |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 95 | * To detect this, 2 reads are performed and compared. |
| 96 | */ |
| 97 | limit = 10; |
| 98 | do { |
| 99 | i = 4; |
| 100 | time1 = 0; |
| 101 | while (i--) { |
| 102 | tmp = rtc_read(RtcTodAddr[i]); |
| 103 | time1 = (time1 << 8) | (tmp & 0xff); |
| 104 | } |
| 105 | |
| 106 | i = 4; |
| 107 | time2 = 0; |
| 108 | while (i--) { |
| 109 | tmp = rtc_read(RtcTodAddr[i]); |
| 110 | time2 = (time2 << 8) | (tmp & 0xff); |
| 111 | } |
| 112 | } while ((time1 != time2) && limit--); |
| 113 | |
| 114 | if (time1 != time2) { |
| 115 | printf("can't get consistent time from rtc chip\n"); |
Yuri Tikhonov | 9bacd94 | 2008-03-20 17:56:04 +0300 | [diff] [blame] | 116 | rel = -1; |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 117 | } |
| 118 | |
Kim Phillips | f91aa8d | 2008-07-10 14:00:15 -0500 | [diff] [blame] | 119 | DEBUGR ("Get RTC s since 1.1.1970: %ld\n", time1); |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 120 | |
Simon Glass | 1299466 | 2015-04-20 12:37:18 -0600 | [diff] [blame] | 121 | rtc_to_tm(time1, tm); /* To Gregorian Date */ |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 122 | |
Yuri Tikhonov | 9bacd94 | 2008-03-20 17:56:04 +0300 | [diff] [blame] | 123 | if (rtc_read(RTC_SR_ADDR) & RTC_SR_BIT_OSF) { |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 124 | printf ("### Warning: RTC oscillator has stopped\n"); |
Yuri Tikhonov | 9bacd94 | 2008-03-20 17:56:04 +0300 | [diff] [blame] | 125 | rel = -1; |
| 126 | } |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 127 | |
| 128 | DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", |
| 129 | tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, |
| 130 | tm->tm_hour, tm->tm_min, tm->tm_sec); |
Yuri Tikhonov | 9bacd94 | 2008-03-20 17:56:04 +0300 | [diff] [blame] | 131 | |
| 132 | return rel; |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 133 | } |
| 134 | |
| 135 | /* |
| 136 | * Set the RTC |
| 137 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 97a2e10 | 2008-09-01 23:06:23 +0200 | [diff] [blame] | 138 | int rtc_set (struct rtc_time *tmp){ |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 139 | |
| 140 | unsigned long time; |
| 141 | unsigned i; |
| 142 | |
| 143 | DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", |
| 144 | tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, |
| 145 | tmp->tm_hour, tmp->tm_min, tmp->tm_sec); |
| 146 | |
| 147 | if (tmp->tm_year < 1970 || tmp->tm_year > 2069) |
| 148 | printf("WARNING: year should be between 1970 and 2069!\n"); |
| 149 | |
Simon Glass | 4283e84 | 2015-04-20 12:37:19 -0600 | [diff] [blame] | 150 | time = rtc_mktime(tmp); |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 151 | |
Kim Phillips | f91aa8d | 2008-07-10 14:00:15 -0500 | [diff] [blame] | 152 | DEBUGR ("Set RTC s since 1.1.1970: %ld (0x%02lx)\n", time, time); |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 153 | |
| 154 | /* write to RTC_TOD_CNT_BYTEn_ADDR */ |
| 155 | for (i = 0; i <= 3; i++) { |
| 156 | rtc_write_raw(RtcTodAddr[i], (unsigned char)(time & 0xff)); |
| 157 | time = time >> 8; |
| 158 | } |
| 159 | |
| 160 | /* Start clock */ |
York Sun | 4a59809 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 161 | rtc_write(RTC_CTL_ADDR, RTC_CTL_BIT_EN_OSC, false); |
Jean-Christophe PLAGNIOL-VILLARD | 97a2e10 | 2008-09-01 23:06:23 +0200 | [diff] [blame] | 162 | |
| 163 | return 0; |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 164 | } |
| 165 | |
| 166 | /* |
| 167 | * Reset the RTC. We setting the date back to 1970-01-01. |
| 168 | * We also enable the oscillator output on the SQW/OUT pin and program |
| 169 | * it for 32,768 Hz output. Note that according to the datasheet, turning |
| 170 | * on the square wave output increases the current drain on the backup |
| 171 | * battery to something between 480nA and 800nA. |
| 172 | */ |
| 173 | void rtc_reset (void){ |
| 174 | |
| 175 | struct rtc_time tmp; |
| 176 | |
| 177 | /* clear status flags */ |
York Sun | 4a59809 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 178 | rtc_write(RTC_SR_ADDR, (RTC_SR_BIT_AF|RTC_SR_BIT_OSF), false); /* clearing OSF and AF */ |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 179 | |
| 180 | /* Initialise DS1374 oriented to MPC8349E-ADS */ |
| 181 | rtc_write (RTC_CTL_ADDR, (RTC_CTL_BIT_EN_OSC |
| 182 | |RTC_CTL_BIT_WACE |
York Sun | 4a59809 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 183 | |RTC_CTL_BIT_AIE), false);/* start osc, disable WACE, clear AIE |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 184 | - set to 0 */ |
| 185 | rtc_write (RTC_CTL_ADDR, (RTC_CTL_BIT_WD_ALM |
| 186 | |RTC_CTL_BIT_WDSTR |
| 187 | |RTC_CTL_BIT_RS1 |
| 188 | |RTC_CTL_BIT_RS2 |
York Sun | 4a59809 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 189 | |RTC_CTL_BIT_BBSQW), true);/* disable WD/ALM, WDSTR set to INT-pin, |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 190 | set BBSQW and SQW to 32k |
| 191 | - set to 1 */ |
| 192 | tmp.tm_year = 1970; |
| 193 | tmp.tm_mon = 1; |
| 194 | tmp.tm_mday= 1; |
| 195 | tmp.tm_hour = 0; |
| 196 | tmp.tm_min = 0; |
| 197 | tmp.tm_sec = 0; |
| 198 | |
| 199 | rtc_set(&tmp); |
| 200 | |
| 201 | printf("RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n", |
| 202 | tmp.tm_year, tmp.tm_mon, tmp.tm_mday, |
| 203 | tmp.tm_hour, tmp.tm_min, tmp.tm_sec); |
| 204 | |
York Sun | 4a59809 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 205 | rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR, 0xAC, true); |
| 206 | rtc_write(RTC_WD_ALM_CNT_BYTE1_ADDR, 0xDE, true); |
| 207 | rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR, 0xAD, true); |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 208 | } |
| 209 | |
| 210 | /* |
| 211 | * Helper functions |
| 212 | */ |
| 213 | static uchar rtc_read (uchar reg) |
| 214 | { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 215 | return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 216 | } |
| 217 | |
York Sun | 4a59809 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 218 | static void rtc_write(uchar reg, uchar val, bool set) |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 219 | { |
York Sun | 4a59809 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 220 | if (set == true) { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 221 | val |= i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg); |
| 222 | i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 223 | } else { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 224 | val = i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg) & ~val; |
| 225 | i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 226 | } |
| 227 | } |
| 228 | |
| 229 | static void rtc_write_raw (uchar reg, uchar val) |
| 230 | { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 231 | i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); |
Marian Balakowicz | c9b21e6 | 2006-03-14 15:59:25 +0100 | [diff] [blame] | 232 | } |
Jon Loeliger | 07efe2a | 2007-07-10 10:27:39 -0500 | [diff] [blame] | 233 | #endif |