| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/gpio/aspeed,sgpio.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Aspeed SGPIO controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Andrew Jeffery <andrew@aj.id.au> |
| 11 | |
| 12 | description: |
| 13 | This SGPIO controller is for ASPEED AST2400, AST2500 and AST2600 SoC, |
| 14 | AST2600 have two sgpio master one with 128 pins another one with 80 pins, |
| 15 | AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial |
| 16 | GPIO pins can be programmed to support the following options |
| 17 | - Support interrupt option for each input port and various interrupt |
| 18 | sensitivity option (level-high, level-low, edge-high, edge-low) |
| 19 | - Support reset tolerance option for each output port |
| 20 | - Directly connected to APB bus and its shift clock is from APB bus clock |
| 21 | divided by a programmable value. |
| 22 | - Co-work with external signal-chained TTL components (74LV165/74LV595) |
| 23 | |
| 24 | properties: |
| 25 | compatible: |
| 26 | enum: |
| 27 | - aspeed,ast2400-sgpio |
| 28 | - aspeed,ast2500-sgpio |
| 29 | - aspeed,ast2600-sgpiom |
| 30 | |
| 31 | reg: |
| 32 | maxItems: 1 |
| 33 | |
| 34 | gpio-controller: true |
| 35 | |
| Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 36 | # Each SGPIO is represented as a pair of input and output GPIOs |
| 37 | gpio-line-names: |
| 38 | minItems: 160 |
| 39 | maxItems: 256 |
| 40 | |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 41 | '#gpio-cells': |
| 42 | const: 2 |
| 43 | |
| 44 | interrupts: |
| 45 | maxItems: 1 |
| 46 | |
| 47 | interrupt-controller: true |
| 48 | |
| Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 49 | '#interrupt-cells': |
| 50 | const: 2 |
| 51 | |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 52 | clocks: |
| 53 | maxItems: 1 |
| 54 | |
| 55 | ngpios: true |
| 56 | |
| 57 | bus-frequency: true |
| 58 | |
| 59 | required: |
| 60 | - compatible |
| 61 | - reg |
| 62 | - gpio-controller |
| 63 | - '#gpio-cells' |
| 64 | - interrupts |
| 65 | - interrupt-controller |
| Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 66 | - '#interrupt-cells' |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 67 | - ngpios |
| 68 | - clocks |
| 69 | - bus-frequency |
| 70 | |
| 71 | additionalProperties: false |
| 72 | |
| 73 | examples: |
| 74 | - | |
| 75 | #include <dt-bindings/clock/aspeed-clock.h> |
| 76 | sgpio: sgpio@1e780200 { |
| 77 | #gpio-cells = <2>; |
| 78 | compatible = "aspeed,ast2500-sgpio"; |
| 79 | gpio-controller; |
| 80 | interrupts = <40>; |
| 81 | reg = <0x1e780200 0x0100>; |
| 82 | clocks = <&syscon ASPEED_CLK_APB>; |
| 83 | interrupt-controller; |
| Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 84 | #interrupt-cells = <2>; |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 85 | ngpios = <80>; |
| 86 | bus-frequency = <12000000>; |
| 87 | }; |