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Tim Harvey0f5717f2022-04-13 11:31:09 -07001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2022 Gateworks Corporation
4 */
5
6#ifndef __IMX8MP_VENICE_H
7#define __IMX8MP_VENICE_H
8
9#include <asm/arch/imx-regs.h>
10#include <linux/sizes.h>
11
Tom Rini6a5dccc2022-11-16 13:10:41 -050012#define CFG_SYS_UBOOT_BASE \
Tim Harvey0f5717f2022-04-13 11:31:09 -070013 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
14
Tim Harvey0f5717f2022-04-13 11:31:09 -070015/* Enable Distro Boot */
Tim Harvey0f5717f2022-04-13 11:31:09 -070016#define BOOT_TARGET_DEVICES(func) \
17 func(MMC, mmc, 1) \
18 func(MMC, mmc, 2) \
19 func(USB, usb, 0) \
20 func(DHCP, dhcp, na)
21#include <config_distro_bootcmd.h>
Tom Rinic9edebe2022-12-04 10:03:50 -050022#define CFG_EXTRA_ENV_SETTINGS \
Tim Harvey942bf432022-11-04 08:51:45 -070023 "splblk=0x40\0" \
24 BOOTENV
Tim Harvey0f5717f2022-04-13 11:31:09 -070025
Tom Rini6a5dccc2022-11-16 13:10:41 -050026#define CFG_SYS_INIT_RAM_ADDR 0x40000000
27#define CFG_SYS_INIT_RAM_SIZE SZ_2M
Tim Harvey0f5717f2022-04-13 11:31:09 -070028
Tom Rinibb4dd962022-11-16 13:10:37 -050029#define CFG_SYS_SDRAM_BASE 0x40000000
Tim Harvey0f5717f2022-04-13 11:31:09 -070030
31/* SDRAM configuration */
32#define PHYS_SDRAM 0x40000000
33#define PHYS_SDRAM_SIZE SZ_4G
Tim Harvey0f5717f2022-04-13 11:31:09 -070034
Tim Harvey0f5717f2022-04-13 11:31:09 -070035#endif