Jason Liu | dec1112 | 2011-11-25 00:18:02 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Based on Linux i.MX iomux-v3.h file: |
| 3 | * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH, |
| 4 | * <armlinux@phytec.de> |
| 5 | * |
| 6 | * Copyright (C) 2011 Freescale Semiconductor, Inc. |
| 7 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 8 | * SPDX-License-Identifier: GPL-2.0+ |
Jason Liu | dec1112 | 2011-11-25 00:18:02 +0000 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #ifndef __MACH_IOMUX_V3_H__ |
| 12 | #define __MACH_IOMUX_V3_H__ |
| 13 | |
Benoît Thébaudeau | a83d1c3 | 2013-04-26 01:34:44 +0000 | [diff] [blame] | 14 | #include <common.h> |
| 15 | |
Jason Liu | dec1112 | 2011-11-25 00:18:02 +0000 | [diff] [blame] | 16 | /* |
| 17 | * build IOMUX_PAD structure |
| 18 | * |
| 19 | * This iomux scheme is based around pads, which are the physical balls |
| 20 | * on the processor. |
| 21 | * |
| 22 | * - Each pad has a pad control register (IOMUXC_SW_PAD_CTRL_x) which controls |
| 23 | * things like driving strength and pullup/pulldown. |
| 24 | * - Each pad can have but not necessarily does have an output routing register |
| 25 | * (IOMUXC_SW_MUX_CTL_PAD_x). |
| 26 | * - Each pad can have but not necessarily does have an input routing register |
| 27 | * (IOMUXC_x_SELECT_INPUT) |
| 28 | * |
| 29 | * The three register sets do not have a fixed offset to each other, |
| 30 | * hence we order this table by pad control registers (which all pads |
| 31 | * have) and put the optional i/o routing registers into additional |
| 32 | * fields. |
| 33 | * |
| 34 | * The naming convention for the pad modes is SOC_PAD_<padname>__<padmode> |
| 35 | * If <padname> or <padmode> refers to a GPIO, it is named GPIO_<unit>_<num> |
| 36 | * |
| 37 | * IOMUX/PAD Bit field definitions |
| 38 | * |
| 39 | * MUX_CTRL_OFS: 0..11 (12) |
| 40 | * PAD_CTRL_OFS: 12..23 (12) |
| 41 | * SEL_INPUT_OFS: 24..35 (12) |
| 42 | * MUX_MODE + SION: 36..40 (5) |
| 43 | * PAD_CTRL + NO_PAD_CTRL: 41..58 (18) |
| 44 | * SEL_INP: 59..62 (4) |
| 45 | * reserved: 63 (1) |
| 46 | */ |
| 47 | |
| 48 | typedef u64 iomux_v3_cfg_t; |
| 49 | |
| 50 | #define MUX_CTRL_OFS_SHIFT 0 |
| 51 | #define MUX_CTRL_OFS_MASK ((iomux_v3_cfg_t)0xfff << MUX_CTRL_OFS_SHIFT) |
| 52 | #define MUX_PAD_CTRL_OFS_SHIFT 12 |
| 53 | #define MUX_PAD_CTRL_OFS_MASK ((iomux_v3_cfg_t)0xfff << \ |
| 54 | MUX_PAD_CTRL_OFS_SHIFT) |
| 55 | #define MUX_SEL_INPUT_OFS_SHIFT 24 |
| 56 | #define MUX_SEL_INPUT_OFS_MASK ((iomux_v3_cfg_t)0xfff << \ |
| 57 | MUX_SEL_INPUT_OFS_SHIFT) |
| 58 | |
| 59 | #define MUX_MODE_SHIFT 36 |
| 60 | #define MUX_MODE_MASK ((iomux_v3_cfg_t)0x1f << MUX_MODE_SHIFT) |
| 61 | #define MUX_PAD_CTRL_SHIFT 41 |
| 62 | #define MUX_PAD_CTRL_MASK ((iomux_v3_cfg_t)0x3ffff << MUX_PAD_CTRL_SHIFT) |
| 63 | #define MUX_SEL_INPUT_SHIFT 59 |
| 64 | #define MUX_SEL_INPUT_MASK ((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT) |
| 65 | |
Otavio Salvador | aa978d8 | 2013-12-16 20:44:00 -0200 | [diff] [blame] | 66 | #define MUX_MODE_SION ((iomux_v3_cfg_t)IOMUX_CONFIG_SION << \ |
| 67 | MUX_MODE_SHIFT) |
Jason Liu | dec1112 | 2011-11-25 00:18:02 +0000 | [diff] [blame] | 68 | #define MUX_PAD_CTRL(x) ((iomux_v3_cfg_t)(x) << MUX_PAD_CTRL_SHIFT) |
| 69 | |
| 70 | #define IOMUX_PAD(pad_ctrl_ofs, mux_ctrl_ofs, mux_mode, sel_input_ofs, \ |
| 71 | sel_input, pad_ctrl) \ |
| 72 | (((iomux_v3_cfg_t)(mux_ctrl_ofs) << MUX_CTRL_OFS_SHIFT) | \ |
| 73 | ((iomux_v3_cfg_t)(mux_mode) << MUX_MODE_SHIFT) | \ |
| 74 | ((iomux_v3_cfg_t)(pad_ctrl_ofs) << MUX_PAD_CTRL_OFS_SHIFT) | \ |
| 75 | ((iomux_v3_cfg_t)(pad_ctrl) << MUX_PAD_CTRL_SHIFT) | \ |
| 76 | ((iomux_v3_cfg_t)(sel_input_ofs) << MUX_SEL_INPUT_OFS_SHIFT)| \ |
| 77 | ((iomux_v3_cfg_t)(sel_input) << MUX_SEL_INPUT_SHIFT)) |
| 78 | |
Benoît Thébaudeau | 334bae6 | 2013-04-26 01:34:46 +0000 | [diff] [blame] | 79 | #define NEW_PAD_CTRL(cfg, pad) (((cfg) & ~MUX_PAD_CTRL_MASK) | \ |
| 80 | MUX_PAD_CTRL(pad)) |
| 81 | |
Benoît Thébaudeau | b89e450 | 2013-04-26 01:34:45 +0000 | [diff] [blame] | 82 | #define __NA_ 0x000 |
| 83 | #define NO_MUX_I 0 |
| 84 | #define NO_PAD_I 0 |
| 85 | |
Jason Liu | dec1112 | 2011-11-25 00:18:02 +0000 | [diff] [blame] | 86 | #define NO_PAD_CTRL (1 << 17) |
Jason Liu | dec1112 | 2011-11-25 00:18:02 +0000 | [diff] [blame] | 87 | |
Benoît Thébaudeau | a83d1c3 | 2013-04-26 01:34:44 +0000 | [diff] [blame] | 88 | #ifdef CONFIG_MX6 |
| 89 | |
Fabio Estevam | ebc8941 | 2013-04-10 09:32:56 +0000 | [diff] [blame] | 90 | #define PAD_CTL_HYS (1 << 16) |
Benoît Thébaudeau | b89e450 | 2013-04-26 01:34:45 +0000 | [diff] [blame] | 91 | |
Benoît Thébaudeau | 2167024 | 2013-04-26 01:34:47 +0000 | [diff] [blame] | 92 | #define PAD_CTL_PUS_100K_DOWN (0 << 14 | PAD_CTL_PUE) |
| 93 | #define PAD_CTL_PUS_47K_UP (1 << 14 | PAD_CTL_PUE) |
| 94 | #define PAD_CTL_PUS_100K_UP (2 << 14 | PAD_CTL_PUE) |
| 95 | #define PAD_CTL_PUS_22K_UP (3 << 14 | PAD_CTL_PUE) |
| 96 | #define PAD_CTL_PUE (1 << 13 | PAD_CTL_PKE) |
Fabio Estevam | ebc8941 | 2013-04-10 09:32:56 +0000 | [diff] [blame] | 97 | #define PAD_CTL_PKE (1 << 12) |
Benoît Thébaudeau | b89e450 | 2013-04-26 01:34:45 +0000 | [diff] [blame] | 98 | |
Fabio Estevam | ebc8941 | 2013-04-10 09:32:56 +0000 | [diff] [blame] | 99 | #define PAD_CTL_ODE (1 << 11) |
Benoît Thébaudeau | b89e450 | 2013-04-26 01:34:45 +0000 | [diff] [blame] | 100 | |
Fabio Estevam | ebc8941 | 2013-04-10 09:32:56 +0000 | [diff] [blame] | 101 | #define PAD_CTL_SPEED_LOW (1 << 6) |
| 102 | #define PAD_CTL_SPEED_MED (2 << 6) |
| 103 | #define PAD_CTL_SPEED_HIGH (3 << 6) |
Benoît Thébaudeau | b89e450 | 2013-04-26 01:34:45 +0000 | [diff] [blame] | 104 | |
Fabio Estevam | ebc8941 | 2013-04-10 09:32:56 +0000 | [diff] [blame] | 105 | #define PAD_CTL_DSE_DISABLE (0 << 3) |
| 106 | #define PAD_CTL_DSE_240ohm (1 << 3) |
| 107 | #define PAD_CTL_DSE_120ohm (2 << 3) |
| 108 | #define PAD_CTL_DSE_80ohm (3 << 3) |
| 109 | #define PAD_CTL_DSE_60ohm (4 << 3) |
| 110 | #define PAD_CTL_DSE_48ohm (5 << 3) |
| 111 | #define PAD_CTL_DSE_40ohm (6 << 3) |
| 112 | #define PAD_CTL_DSE_34ohm (7 << 3) |
Benoît Thébaudeau | a83d1c3 | 2013-04-26 01:34:44 +0000 | [diff] [blame] | 113 | |
Fabio Estevam | d3b1742 | 2014-04-29 10:15:46 -0300 | [diff] [blame] | 114 | #if defined CONFIG_MX6SL |
| 115 | #define PAD_CTL_LVE (1 << 1) |
| 116 | #define PAD_CTL_LVE_BIT (1 << 22) |
| 117 | #endif |
| 118 | |
Alison Wang | 831beaf | 2013-05-27 22:55:41 +0000 | [diff] [blame] | 119 | #elif defined(CONFIG_VF610) |
| 120 | |
| 121 | #define PAD_MUX_MODE_SHIFT 20 |
| 122 | |
Anthony Felice | af0464f | 2014-09-06 19:47:06 +0200 | [diff] [blame] | 123 | #define PAD_CTL_INPUT_DIFFERENTIAL (1 << 16) |
| 124 | |
Alison Wang | 831beaf | 2013-05-27 22:55:41 +0000 | [diff] [blame] | 125 | #define PAD_CTL_SPEED_MED (1 << 12) |
| 126 | #define PAD_CTL_SPEED_HIGH (3 << 12) |
| 127 | |
Stefan Agner | 0f52729 | 2014-08-06 10:59:35 +0200 | [diff] [blame] | 128 | #define PAD_CTL_SRE (1 << 11) |
| 129 | |
Albert ARIBAUD \(3ADEV\) | 40281ba | 2015-06-19 14:18:29 +0200 | [diff] [blame] | 130 | #define PAD_CTL_ODE (1 << 10) |
| 131 | |
Alison Wang | 2927a19 | 2014-05-06 09:13:02 +0800 | [diff] [blame] | 132 | #define PAD_CTL_DSE_150ohm (1 << 6) |
Alison Wang | 831beaf | 2013-05-27 22:55:41 +0000 | [diff] [blame] | 133 | #define PAD_CTL_DSE_50ohm (3 << 6) |
| 134 | #define PAD_CTL_DSE_25ohm (6 << 6) |
| 135 | #define PAD_CTL_DSE_20ohm (7 << 6) |
| 136 | |
| 137 | #define PAD_CTL_PUS_47K_UP (1 << 4 | PAD_CTL_PUE) |
| 138 | #define PAD_CTL_PUS_100K_UP (2 << 4 | PAD_CTL_PUE) |
Alison Wang | 2927a19 | 2014-05-06 09:13:02 +0800 | [diff] [blame] | 139 | #define PAD_CTL_PUS_22K_UP (3 << 4 | PAD_CTL_PUE) |
Alison Wang | 831beaf | 2013-05-27 22:55:41 +0000 | [diff] [blame] | 140 | #define PAD_CTL_PKE (1 << 3) |
| 141 | #define PAD_CTL_PUE (1 << 2 | PAD_CTL_PKE) |
| 142 | |
| 143 | #define PAD_CTL_OBE_IBE_ENABLE (3 << 0) |
Stefan Agner | 0f52729 | 2014-08-06 10:59:35 +0200 | [diff] [blame] | 144 | #define PAD_CTL_OBE_ENABLE (1 << 1) |
| 145 | #define PAD_CTL_IBE_ENABLE (1 << 0) |
Alison Wang | 831beaf | 2013-05-27 22:55:41 +0000 | [diff] [blame] | 146 | |
Benoît Thébaudeau | a83d1c3 | 2013-04-26 01:34:44 +0000 | [diff] [blame] | 147 | #else |
| 148 | |
| 149 | #define PAD_CTL_DVS (1 << 13) |
| 150 | #define PAD_CTL_INPUT_DDR (1 << 9) |
| 151 | #define PAD_CTL_HYS (1 << 8) |
| 152 | |
| 153 | #define PAD_CTL_PKE (1 << 7) |
| 154 | #define PAD_CTL_PUE (1 << 6 | PAD_CTL_PKE) |
| 155 | #define PAD_CTL_PUS_100K_DOWN (0 << 4 | PAD_CTL_PUE) |
| 156 | #define PAD_CTL_PUS_47K_UP (1 << 4 | PAD_CTL_PUE) |
| 157 | #define PAD_CTL_PUS_100K_UP (2 << 4 | PAD_CTL_PUE) |
| 158 | #define PAD_CTL_PUS_22K_UP (3 << 4 | PAD_CTL_PUE) |
| 159 | |
| 160 | #define PAD_CTL_ODE (1 << 3) |
| 161 | |
| 162 | #define PAD_CTL_DSE_LOW (0 << 1) |
| 163 | #define PAD_CTL_DSE_MED (1 << 1) |
| 164 | #define PAD_CTL_DSE_HIGH (2 << 1) |
| 165 | #define PAD_CTL_DSE_MAX (3 << 1) |
| 166 | |
| 167 | #endif |
| 168 | |
Fabio Estevam | ebc8941 | 2013-04-10 09:32:56 +0000 | [diff] [blame] | 169 | #define PAD_CTL_SRE_SLOW (0 << 0) |
Benoît Thébaudeau | b89e450 | 2013-04-26 01:34:45 +0000 | [diff] [blame] | 170 | #define PAD_CTL_SRE_FAST (1 << 0) |
Fabio Estevam | ebc8941 | 2013-04-10 09:32:56 +0000 | [diff] [blame] | 171 | |
| 172 | #define IOMUX_CONFIG_SION 0x10 |
Benoît Thébaudeau | b89e450 | 2013-04-26 01:34:45 +0000 | [diff] [blame] | 173 | |
| 174 | #define GPIO_PIN_MASK 0x1f |
| 175 | #define GPIO_PORT_SHIFT 5 |
| 176 | #define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT) |
| 177 | #define GPIO_PORTA (0 << GPIO_PORT_SHIFT) |
| 178 | #define GPIO_PORTB (1 << GPIO_PORT_SHIFT) |
| 179 | #define GPIO_PORTC (2 << GPIO_PORT_SHIFT) |
| 180 | #define GPIO_PORTD (3 << GPIO_PORT_SHIFT) |
| 181 | #define GPIO_PORTE (4 << GPIO_PORT_SHIFT) |
| 182 | #define GPIO_PORTF (5 << GPIO_PORT_SHIFT) |
Jason Liu | dec1112 | 2011-11-25 00:18:02 +0000 | [diff] [blame] | 183 | |
Stefan Roese | 4982d9a | 2013-04-10 23:06:46 +0000 | [diff] [blame] | 184 | void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad); |
| 185 | void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list, |
Eric Nelson | 8911083 | 2012-10-03 07:26:37 +0000 | [diff] [blame] | 186 | unsigned count); |
Ye.Li | 700020e | 2014-10-30 18:53:49 +0800 | [diff] [blame] | 187 | /* |
| 188 | * Set bits for general purpose registers |
| 189 | */ |
| 190 | void imx_iomux_set_gpr_register(int group, int start_bit, |
| 191 | int num_bits, int value); |
Bhuvanchandra DV | 6d236aa | 2015-06-01 18:37:16 +0530 | [diff] [blame] | 192 | #ifdef CONFIG_IOMUX_SHARE_CONF_REG |
| 193 | void imx_iomux_gpio_set_direction(unsigned int gpio, |
| 194 | unsigned int direction); |
| 195 | void imx_iomux_gpio_get_function(unsigned int gpio, |
| 196 | u32 *gpio_state); |
| 197 | #endif |
Jason Liu | dec1112 | 2011-11-25 00:18:02 +0000 | [diff] [blame] | 198 | |
Tim Harvey | 09a6233 | 2014-06-02 16:13:24 -0700 | [diff] [blame] | 199 | /* macros for declaring and using pinmux array */ |
| 200 | #if defined(CONFIG_MX6QDL) |
| 201 | #define IOMUX_PADS(x) (MX6Q_##x), (MX6DL_##x) |
| 202 | #define SETUP_IOMUX_PAD(def) \ |
| 203 | if (is_cpu_type(MXC_CPU_MX6Q)) { \ |
| 204 | imx_iomux_v3_setup_pad(MX6Q_##def); \ |
| 205 | } else { \ |
| 206 | imx_iomux_v3_setup_pad(MX6DL_##def); \ |
| 207 | } |
| 208 | #define SETUP_IOMUX_PADS(x) \ |
| 209 | imx_iomux_v3_setup_multiple_pads(x, ARRAY_SIZE(x)/2) |
| 210 | #elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) |
| 211 | #define IOMUX_PADS(x) MX6Q_##x |
| 212 | #define SETUP_IOMUX_PAD(def) \ |
| 213 | imx_iomux_v3_setup_pad(MX6Q_##def); |
| 214 | #define SETUP_IOMUX_PADS(x) \ |
| 215 | imx_iomux_v3_setup_multiple_pads(x, ARRAY_SIZE(x)) |
| 216 | #else |
| 217 | #define IOMUX_PADS(x) MX6DL_##x |
| 218 | #define SETUP_IOMUX_PAD(def) \ |
| 219 | imx_iomux_v3_setup_pad(MX6DL_##def); |
| 220 | #define SETUP_IOMUX_PADS(x) \ |
| 221 | imx_iomux_v3_setup_multiple_pads(x, ARRAY_SIZE(x)) |
| 222 | #endif |
| 223 | |
Jason Liu | dec1112 | 2011-11-25 00:18:02 +0000 | [diff] [blame] | 224 | #endif /* __MACH_IOMUX_V3_H__*/ |