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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Heiko Schocherb7a6d142015-06-15 14:56:41 +02002/*
3 * (C) Copyright 2013 Siemens Schweiz AG
4 * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 *
6 * Based on:
7 * U-Boot file:/include/configs/am335x_evm.h
8 *
Nishanth Menoneaa39c62023-11-01 15:56:03 -05009 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
Heiko Schocherb7a6d142015-06-15 14:56:41 +020010 */
11
12#ifndef __CONFIG_RASTABAN_H
13#define __CONFIG_RASTABAN_H
14
15#include "siemens-am33x-common.h"
16
Heiko Schocherb7a6d142015-06-15 14:56:41 +020017#define DDR_PLL_FREQ 303
Heiko Schocherb7a6d142015-06-15 14:56:41 +020018
19/* FWD Button = 27
20 * SRV Button = 87 */
21#define BOARD_DFU_BUTTON_GPIO 27
22#define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */
23/* In dfu mode keep led1 on */
Tom Riniaaf0f732022-12-04 10:03:41 -050024#define CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \
Heiko Schocherb7a6d142015-06-15 14:56:41 +020025 "button_dfu0=27\0" \
26 "button_dfu1=87\0" \
27 "led0=3,0,1\0" \
28 "led1=4,0,0\0" \
29 "led2=5,0,1\0" \
30 "led3=62,0,1\0" \
31 "led4=60,0,1\0" \
32 "led5=63,0,1\0"
33
Heiko Schocherb7a6d142015-06-15 14:56:41 +020034 /* Physical Memory Map */
Tom Rinidb9c39e2022-12-04 10:04:51 -050035#define CFG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
Heiko Schocherb7a6d142015-06-15 14:56:41 +020036
Heiko Schocherb7a6d142015-06-15 14:56:41 +020037#define EEPROM_ADDR_DDR3 0x90
38#define EEPROM_ADDR_CHIP 0x120
39
Heiko Schocherb7a6d142015-06-15 14:56:41 +020040/* Default env settings */
Tom Rinic9edebe2022-12-04 10:03:50 -050041#define CFG_EXTRA_ENV_SETTINGS \
Heiko Schocherb7a6d142015-06-15 14:56:41 +020042 "hostname=rastaban\0" \
Heiko Schochercbec11a2016-06-07 08:55:45 +020043 "ubi_off=2048\0"\
Heiko Schocherb7a6d142015-06-15 14:56:41 +020044 "nand_img_size=0x400000\0" \
45 "optargs=\0" \
46 "preboot=draco_led 0\0" \
Tom Riniaaf0f732022-12-04 10:03:41 -050047 CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \
Tom Rinicbd97e72022-12-04 10:03:45 -050048 CFG_ENV_SETTINGS_V2 \
Tom Rini51ec9bd2022-12-04 10:03:43 -050049 CFG_ENV_SETTINGS_NAND_V2
Heiko Schocherb7a6d142015-06-15 14:56:41 +020050
Heiko Schocherb7a6d142015-06-15 14:56:41 +020051#endif /* ! __CONFIG_RASTABAN_H */