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Sjoerd Simonsf93564c2019-02-25 15:33:00 +00001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * mux.c
4 *
5 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
6 * Copyright (C) 2018 Robert Bosch Power Tools GmbH
7 */
8
9#include <common.h>
10#include <i2c.h>
11#include <asm/arch/hardware.h>
12#include <asm/arch/mux.h>
13#include <asm/arch/sys_proto.h>
14#include <asm/io.h>
15#include "board.h"
16
17static struct module_pin_mux uart0_pin_mux[] = {
18 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)},
19 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},
20 {-1},
21};
22
23static struct module_pin_mux i2c0_pin_mux[] = {
24 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
25 {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
26 {-1},
27};
28
29static struct module_pin_mux adc_voltages_en[] = {
30 {OFFSET(mcasp0_ahclkx), (MODE(7) | PULLUP_EN)},
31 {-1},
32};
33
34static struct module_pin_mux asp_power_en[] = {
35 {OFFSET(mcasp0_aclkx), (MODE(7) | PULLUP_EN)},
36 {-1},
37};
38
39static struct module_pin_mux switch_off_3v6_pin_mux[] = {
40 {OFFSET(mii1_txd0), (MODE(7) | PULLUP_EN)},
41 /*
42 * The uart1 lines are made floating inputs, based on the Guardian
43 * A2 Sample Power Supply Schematics
44 */
45 {OFFSET(uart1_rxd), (MODE(7) | PULLUDDIS)},
46 {OFFSET(uart1_txd), (MODE(7) | PULLUDDIS)},
47 {-1},
48};
49
50#ifdef CONFIG_NAND
51static struct module_pin_mux nand_pin_mux[] = {
52 {OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)},
53 {OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)},
54 {OFFSET(gpmc_ad2), (MODE(0) | PULLUDDIS | RXACTIVE)},
55 {OFFSET(gpmc_ad3), (MODE(0) | PULLUDDIS | RXACTIVE)},
56 {OFFSET(gpmc_ad4), (MODE(0) | PULLUDDIS | RXACTIVE)},
57 {OFFSET(gpmc_ad5), (MODE(0) | PULLUDDIS | RXACTIVE)},
58 {OFFSET(gpmc_ad6), (MODE(0) | PULLUDDIS | RXACTIVE)},
59 {OFFSET(gpmc_ad7), (MODE(0) | PULLUDDIS | RXACTIVE)},
60#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
61 {OFFSET(gpmc_ad8), (MODE(0) | PULLUDDIS | RXACTIVE)},
62 {OFFSET(gpmc_ad9), (MODE(0) | PULLUDDIS | RXACTIVE)},
63 {OFFSET(gpmc_ad10), (MODE(0) | PULLUDDIS | RXACTIVE)},
64 {OFFSET(gpmc_ad11), (MODE(0) | PULLUDDIS | RXACTIVE)},
65 {OFFSET(gpmc_ad12), (MODE(0) | PULLUDDIS | RXACTIVE)},
66 {OFFSET(gpmc_ad13), (MODE(0) | PULLUDDIS | RXACTIVE)},
67 {OFFSET(gpmc_ad14), (MODE(0) | PULLUDDIS | RXACTIVE)},
68 {OFFSET(gpmc_ad15), (MODE(0) | PULLUDDIS | RXACTIVE)},
69#endif
70 {OFFSET(gpmc_wait0), (MODE(0) | PULLUP_EN | RXACTIVE)},
71 {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN)},
72 {OFFSET(gpmc_csn0), (MODE(0) | PULLUP_EN)},
73 {OFFSET(gpmc_wen), (MODE(0) | PULLDOWN_EN)},
74 {OFFSET(gpmc_oen_ren), (MODE(0) | PULLDOWN_EN)},
75 {OFFSET(gpmc_advn_ale), (MODE(0) | PULLDOWN_EN)},
76 {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLDOWN_EN)},
77 {-1},
78};
79#endif
80
81void enable_uart0_pin_mux(void)
82{
83 configure_module_pin_mux(uart0_pin_mux);
84}
85
86void enable_i2c0_pin_mux(void)
87{
88 configure_module_pin_mux(i2c0_pin_mux);
89}
90
91void enable_board_pin_mux(void)
92{
93#ifdef CONFIG_NAND
94 configure_module_pin_mux(nand_pin_mux);
95#endif
96 configure_module_pin_mux(adc_voltages_en);
97 configure_module_pin_mux(asp_power_en);
98 configure_module_pin_mux(switch_off_3v6_pin_mux);
99}