blob: e83dedbc5bc501e399584319ecffde5db2b4a686 [file] [log] [blame]
Kever Yang0d3d7832016-07-19 21:16:59 +08001/*
2 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6#include <common.h>
Kever Yang6d26c062016-08-16 17:58:13 +08007#include <dm.h>
Kever Yangea61d142017-04-19 16:01:14 +08008#include <ram.h>
Kever Yang6d26c062016-08-16 17:58:13 +08009#include <dm/pinctrl.h>
Kever Yang11c21c52016-09-23 15:57:20 +080010#include <dm/uclass-internal.h>
Kever Yang6d26c062016-08-16 17:58:13 +080011#include <asm/arch/periph.h>
Kever Yangb1395292016-08-24 12:02:22 +080012#include <power/regulator.h>
Kever Yang0d3d7832016-07-19 21:16:59 +080013
14DECLARE_GLOBAL_DATA_PTR;
15
16int board_init(void)
17{
Kever Yangb1395292016-08-24 12:02:22 +080018 struct udevice *pinctrl, *regulator;
Kever Yang6d26c062016-08-16 17:58:13 +080019 int ret;
20
21 /*
22 * The PWM do not have decicated interrupt number in dts and can
23 * not get periph_id by pinctrl framework, so let's init them here.
24 * The PWM2 and PWM3 are for pwm regulater.
25 */
26 ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
27 if (ret) {
28 debug("%s: Cannot find pinctrl device\n", __func__);
29 goto out;
30 }
31
32 ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2);
33 if (ret) {
34 debug("%s PWM2 pinctrl init fail!\n", __func__);
35 goto out;
36 }
37
38 ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM3);
39 if (ret) {
40 debug("%s PWM3 pinctrl init fail!\n", __func__);
41 goto out;
42 }
43
Kever Yang9988df72017-04-12 12:00:06 +080044 ret = regulators_enable_boot_on(false);
Kever Yang11c21c52016-09-23 15:57:20 +080045 if (ret)
Kever Yang9988df72017-04-12 12:00:06 +080046 debug("%s: Cannot enable boot on regulator\n", __func__);
Kever Yang11c21c52016-09-23 15:57:20 +080047
Kever Yangb1395292016-08-24 12:02:22 +080048 ret = regulator_get_by_platname("vcc5v0_host", &regulator);
49 if (ret) {
50 debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
51 goto out;
52 }
53
54 ret = regulator_set_enable(regulator, true);
55 if (ret) {
56 debug("%s vcc5v0-host-en set fail!\n", __func__);
57 goto out;
58 }
59
Kever Yang6d26c062016-08-16 17:58:13 +080060out:
Kever Yang0d3d7832016-07-19 21:16:59 +080061 return 0;
62}
63
64int dram_init(void)
65{
Kever Yangea61d142017-04-19 16:01:14 +080066 struct ram_info ram;
67 struct udevice *dev;
68 int ret;
69
70 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
71 if (ret) {
72 debug("DRAM init failed: %d\n", ret);
73 return ret;
74 }
75 ret = ram_get_info(dev, &ram);
76 if (ret) {
77 debug("Cannot get DRAM size: %d\n", ret);
78 return ret;
79 }
80 debug("SDRAM base=%llx, size=%x\n", ram.base, (unsigned int)ram.size);
81 gd->ram_size = ram.size;
82
Kever Yang0d3d7832016-07-19 21:16:59 +080083 return 0;
84}
85
Simon Glass2f949c32017-03-31 08:40:32 -060086int dram_init_banksize(void)
Kever Yang0d3d7832016-07-19 21:16:59 +080087{
Kever Yange6181f52016-07-25 11:45:54 +080088 /* Reserve 0x200000 for ATF bl31 */
89 gd->bd->bi_dram[0].start = 0x200000;
Kever Yangb6eda402016-11-07 16:30:34 +080090 gd->bd->bi_dram[0].size = 0x7e000000;
Simon Glass2f949c32017-03-31 08:40:32 -060091
92 return 0;
Kever Yang0d3d7832016-07-19 21:16:59 +080093}