blob: 30563ebe7be4a4e525f94e47dfcc191b79e721b8 [file] [log] [blame]
Hou Zhiqiang505d7352016-06-28 20:18:13 +08001/*
2 * Copyright 2016 NXP Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <config.h>
8#include <linux/linkage.h>
9#include <asm/system.h>
10#include <asm/macro.h>
11
12WEAK(_sec_firmware_entry)
13 /*
14 * x0: Secure Firmware entry point
15 * x1: Exception return address Low
16 * x2: Exception return address High
17 */
18
19 /* Save stack pointer for EL2 */
20 mov x3, sp
21 msr sp_el2, x3
22
23 /* Set exception return address hold pointer */
24 adr x4, 1f
25 mov x3, x4
Hou Zhiqiang2498c232017-01-16 17:31:47 +080026#ifdef CONFIG_ARMV8_SEC_FIRMWARE_ERET_ADDR_REVERT
Hou Zhiqiang505d7352016-06-28 20:18:13 +080027 rev w3, w3
28#endif
29 str w3, [x1]
30 lsr x3, x4, #32
Hou Zhiqiang2498c232017-01-16 17:31:47 +080031#ifdef CONFIG_ARMV8_SEC_FIRMWARE_ERET_ADDR_REVERT
Hou Zhiqiang505d7352016-06-28 20:18:13 +080032 rev w3, w3
33#endif
34 str w3, [x2]
35
36 /* Call SEC monitor */
37 br x0
38
391:
40 mov x0, #0
41 ret
42ENDPROC(_sec_firmware_entry)
43
Hou Zhiqiang6be115d2017-01-16 17:31:48 +080044#ifdef CONFIG_SEC_FIRMWARE_ARMV8_PSCI
Hou Zhiqiang505d7352016-06-28 20:18:13 +080045ENTRY(_sec_firmware_support_psci_version)
46 mov x0, 0x84000000
47 mov x1, 0x0
48 mov x2, 0x0
49 mov x3, 0x0
50 smc #0
51 ret
52ENDPROC(_sec_firmware_support_psci_version)
Alison Wangf547fca2016-11-10 10:49:05 +080053
54/*
55 * Switch from AArch64 EL2 to AArch32 EL2
56 * @param inputs:
57 * x0: argument, zero
58 * x1: machine nr
59 * x2: fdt address
Alison Wangeb2088d2017-01-17 09:39:17 +080060 * x3: input argument
61 * x4: kernel entry point
Alison Wangf547fca2016-11-10 10:49:05 +080062 * @param outputs for secure firmware:
63 * x0: function id
64 * x1: kernel entry point
65 * x2: machine nr
66 * x3: fdt address
67*/
68ENTRY(armv8_el2_to_aarch32)
Alison Wangf547fca2016-11-10 10:49:05 +080069 mov x3, x2
70 mov x2, x1
Alison Wangeb2088d2017-01-17 09:39:17 +080071 mov x1, x4
Alison Wangf547fca2016-11-10 10:49:05 +080072 ldr x0, =0xc000ff04
73 smc #0
74 ret
75ENDPROC(armv8_el2_to_aarch32)
Hou Zhiqiang505d7352016-06-28 20:18:13 +080076#endif