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Amit Singh Tomar8821be42020-04-19 19:28:30 +05301/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Actions Semi S700 Register Definitions
4 *
5 */
6
7#ifndef _OWL_REGS_S700_H_
8#define _OWL_REGS_S700_H_
9
10#define CMU_COREPLL 0x0000
11#define CMU_DEVPLL 0x0004
12#define CMU_DDRPLL 0x0008
13#define CMU_NANDPLL 0x000C
14#define CMU_DISPLAYPLL 0x0010
15#define CMU_AUDIOPLL 0x0014
16#define CMU_TVOUTPLL 0x0018
17#define CMU_BUSCLK 0x001C
18#define CMU_SENSORCLK 0x0020
19#define CMU_LCDCLK 0x0024
20#define CMU_DSIPLLCLK 0x0028
21#define CMU_CSICLK 0x002C
22#define CMU_DECLK 0x0030
23#define CMU_SICLK 0x0034
24#define CMU_BUSCLK1 0x0038
25#define CMU_HDECLK 0x003C
26#define CMU_VDECLK 0x0040
27#define CMU_VCECLK 0x0044
28#define CMU_NANDCCLK 0x004C
29#define CMU_SD0CLK 0x0050
30#define CMU_SD1CLK 0x0054
31#define CMU_SD2CLK 0x0058
32#define CMU_UART0CLK 0x005C
33#define CMU_UART1CLK 0x0060
34#define CMU_UART2CLK 0x0064
35#define CMU_UART3CLK 0x0068
36#define CMU_UART4CLK 0x006C
37#define CMU_UART5CLK 0x0070
38#define CMU_UART6CLK 0x0074
39#define CMU_PWM0CLK 0x0078
40#define CMU_PWM1CLK 0x007C
41#define CMU_PWM2CLK 0x0080
42#define CMU_PWM3CLK 0x0084
43#define CMU_PWM4CLK 0x0088
44#define CMU_PWM5CLK 0x008C
45#define CMU_GPU3DCLK 0x0090
46#define CMU_CORECTL 0x009C
47#define CMU_DEVCLKEN0 0x00A0
48#define CMU_DEVCLKEN1 0x00A4
49#define CMU_DEVRST0 0x00A8
50#define CMU_DEVRST1 0x00AC
51#define CMU_USBPLL 0x00B0
52#define CMU_ETHERNETPLL 0x00B4
53#define CMU_CVBSPLL 0x00B8
54#define CMU_SSTSCLK 0x00C0
55
Amit Singh Tomarea4179e2020-05-09 19:55:09 +053056#define CMU_DEVCLKEN1_ETH BIT(23)
57
Amit Singh Tomar8821be42020-04-19 19:28:30 +053058#endif