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Sumit Garg89a8ec92022-07-12 12:42:12 +05301// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Qualcomm QCS404 memory map
4 *
5 * (C) Copyright 2022 Sumit Garg <sumit.garg@linaro.org>
6 */
7
8#include <common.h>
9#include <asm/armv8/mmu.h>
10
11static struct mm_region qcs404_mem_map[] = {
12 {
13 .virt = 0x0UL, /* Peripheral block */
14 .phys = 0x0UL, /* Peripheral block */
15 .size = 0x8000000UL,
16 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
17 PTE_BLOCK_NON_SHARE |
18 PTE_BLOCK_PXN | PTE_BLOCK_UXN
19 }, {
20 .virt = 0x80000000UL, /* DDR */
21 .phys = 0x80000000UL, /* DDR */
Sumit Gargf9c6ee42023-02-01 19:28:48 +053022 .size = 0x05900000UL,
23 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
24 PTE_BLOCK_INNER_SHARE
25 }, {
26 .virt = 0x89600000UL, /* DDR */
27 .phys = 0x89600000UL, /* DDR */
28 .size = 0x162000000UL,
29 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
30 PTE_BLOCK_INNER_SHARE
31 }, {
32 .virt = 0xa0000000UL, /* DDR */
33 .phys = 0xa0000000UL, /* DDR */
34 .size = 0x20000000UL,
Sumit Garg89a8ec92022-07-12 12:42:12 +053035 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
36 PTE_BLOCK_INNER_SHARE
37 }, {
38 /* List terminator */
39 0,
40 }
41};
42
43struct mm_region *mem_map = qcs404_mem_map;