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git01.mediatek.com / filogic / uboot / ea19a8d49c230a5799443e4e7c17c29ad3831335 / . / arch / arm / cpu / arm926ejs / mx25 / reset.c
blob: 38df1c94022726f887767115f0b6190d62a8a939 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
John Rigby9c146032010-01-25 23:12:56 -0700[diff] [blame]2/*
3 * (C) Copyright 2002
4 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
5 * Marius Groeger <mgroeger@sysgo.de>
6 *
7 * (C) Copyright 2002
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Alex Zuepke <azu@sysgo.de>
10 *
11 * (C) Copyright 2002
12 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
13 *
14 * (C) Copyright 2009
15 * Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com>
John Rigby9c146032010-01-25 23:12:56 -0700[diff] [blame]16 */
17
18#include <common.h>
Simon Glassafb02152019-12-28 10:45:01 -0700[diff] [blame]19#include <cpu_func.h>
John Rigby9c146032010-01-25 23:12:56 -0700[diff] [blame]20#include <asm/io.h>
21#include <asm/arch/imx-regs.h>
22
23/*
24 * Reset the cpu by setting up the watchdog timer and let it time out
25 */
Fabio Estevamf231efb2011-10-13 05:34:59 +0000[diff] [blame]26void reset_cpu(ulong ignored)
John Rigby9c146032010-01-25 23:12:56 -0700[diff] [blame]27{
28 struct wdog_regs *regs = (struct wdog_regs *)IMX_WDT_BASE;
29 /* Disable watchdog and set Time-Out field to 0 */
Matthias Weisser0fe61ce2010-10-27 16:34:38 +0200[diff] [blame]30 writew(0, &regs->wcr);
John Rigby9c146032010-01-25 23:12:56 -0700[diff] [blame]31
32 /* Write Service Sequence */
Matthias Weisser0fe61ce2010-10-27 16:34:38 +0200[diff] [blame]33 writew(WSR_UNLOCK1, &regs->wsr);
34 writew(WSR_UNLOCK2, &regs->wsr);
John Rigby9c146032010-01-25 23:12:56 -0700[diff] [blame]35
36 /* Enable watchdog */
Matthias Weisser0fe61ce2010-10-27 16:34:38 +0200[diff] [blame]37 writew(WCR_WDE, &regs->wcr);
John Rigby9c146032010-01-25 23:12:56 -0700[diff] [blame]38
39 while (1) ;
40}