blob: cdc0062c3b842548dfd99cdc78a3ace8559f4816 [file] [log] [blame]
Michal Simek316a9f22018-03-28 15:00:25 +02001/*
2 * Configuration for Xilinx ZynqMP zc1751 XM017 DC3
3 *
4 * (C) Copyright 2015 Xilinx, Inc.
5 * Michal Simek <michal.simek@xilinx.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_ZYNQMP_ZC1751_XM017_DC3_H
11#define __CONFIG_ZYNQMP_ZC1751_XM017_DC3_H
12
13#define CONFIG_ZYNQ_SDHCI1
14
15#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
16 ZYNQMP_USB1_XHCI_BASEADDR}
17
18#include <configs/xilinx_zynqmp.h>
19
20#endif /* __CONFIG_ZYNQMP_ZC1751_XM017_DC3_H */