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Masahiro Yamada1f3d9c72015-02-05 14:42:54 +09001/*
Masahiro Yamada4e5d28d2015-09-22 00:27:31 +09002 * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada1f3d9c72015-02-05 14:42:54 +09003 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
Masahiro Yamada24802562016-06-29 19:39:03 +09007#include <common.h>
8#include <libfdt.h>
9#include <linux/io.h>
10
Masahiro Yamadaefdf3402016-01-09 01:51:13 +090011#include "init.h"
12#include "micro-support-card.h"
13#include "soc-info.h"
Masahiro Yamada1f3d9c72015-02-05 14:42:54 +090014
Masahiro Yamada24802562016-06-29 19:39:03 +090015DECLARE_GLOBAL_DATA_PTR;
16
17static void uniphier_setup_xirq(void)
18{
19 const void *fdt = gd->fdt_blob;
20 int soc_node, aidet_node;
21 const u32 *val;
22 unsigned long aidet_base;
23 u32 tmp;
24
25 soc_node = fdt_path_offset(fdt, "/soc");
26 if (soc_node < 0)
27 return;
28
29 aidet_node = fdt_subnode_offset_namelen(fdt, soc_node, "aidet", 5);
30 if (aidet_node < 0)
31 return;
32
33 val = fdt_getprop(fdt, aidet_node, "reg", NULL);
34 if (!val)
35 return;
36
37 aidet_base = fdt32_to_cpu(*val);
38
39 tmp = readl(aidet_base + 8); /* AIDET DETCONFR2 */
40 tmp |= 0x00ff0000; /* Set XIRQ0-7 low active */
41 writel(tmp, aidet_base + 8);
42
43 tmp = readl(0x55000090); /* IRQCTL */
44 tmp |= 0x000000ff;
45 writel(tmp, 0x55000090);
46}
47
Masahiro Yamada1f3d9c72015-02-05 14:42:54 +090048int board_early_init_f(void)
49{
Masahiro Yamada4e5d28d2015-09-22 00:27:31 +090050 led_puts("U0");
Masahiro Yamada1f3d9c72015-02-05 14:42:54 +090051
Masahiro Yamada75f16f82015-09-22 00:27:39 +090052 switch (uniphier_get_soc_type()) {
Masahiro Yamada53c59ae2016-03-18 16:41:43 +090053#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
54 case SOC_UNIPHIER_SLD3:
Masahiro Yamada98905692016-03-30 20:17:02 +090055 uniphier_sld3_pin_init();
Masahiro Yamada75f16f82015-09-22 00:27:39 +090056 led_puts("U1");
Masahiro Yamada98905692016-03-30 20:17:02 +090057 uniphier_ld4_clk_init();
Masahiro Yamada75f16f82015-09-22 00:27:39 +090058 break;
59#endif
Masahiro Yamada53c59ae2016-03-18 16:41:43 +090060#if defined(CONFIG_ARCH_UNIPHIER_LD4)
61 case SOC_UNIPHIER_LD4:
Masahiro Yamada98905692016-03-30 20:17:02 +090062 uniphier_ld4_pin_init();
Masahiro Yamada75f16f82015-09-22 00:27:39 +090063 led_puts("U1");
Masahiro Yamada98905692016-03-30 20:17:02 +090064 uniphier_ld4_clk_init();
Masahiro Yamada75f16f82015-09-22 00:27:39 +090065 break;
66#endif
Masahiro Yamada53c59ae2016-03-18 16:41:43 +090067#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
68 case SOC_UNIPHIER_PRO4:
Masahiro Yamada98905692016-03-30 20:17:02 +090069 uniphier_pro4_pin_init();
Masahiro Yamada75f16f82015-09-22 00:27:39 +090070 led_puts("U1");
Masahiro Yamada98905692016-03-30 20:17:02 +090071 uniphier_pro4_clk_init();
Masahiro Yamada75f16f82015-09-22 00:27:39 +090072 break;
73#endif
Masahiro Yamada53c59ae2016-03-18 16:41:43 +090074#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
75 case SOC_UNIPHIER_SLD8:
Masahiro Yamada98905692016-03-30 20:17:02 +090076 uniphier_sld8_pin_init();
Masahiro Yamada75f16f82015-09-22 00:27:39 +090077 led_puts("U1");
Masahiro Yamada98905692016-03-30 20:17:02 +090078 uniphier_ld4_clk_init();
Masahiro Yamada75f16f82015-09-22 00:27:39 +090079 break;
80#endif
Masahiro Yamada53c59ae2016-03-18 16:41:43 +090081#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
82 case SOC_UNIPHIER_PRO5:
Masahiro Yamada98905692016-03-30 20:17:02 +090083 uniphier_pro5_pin_init();
Masahiro Yamadad5167d52015-09-22 00:27:40 +090084 led_puts("U1");
Masahiro Yamada98905692016-03-30 20:17:02 +090085 uniphier_pro5_clk_init();
Masahiro Yamadad5167d52015-09-22 00:27:40 +090086 break;
87#endif
Masahiro Yamada53c59ae2016-03-18 16:41:43 +090088#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
89 case SOC_UNIPHIER_PXS2:
Masahiro Yamada98905692016-03-30 20:17:02 +090090 uniphier_pxs2_pin_init();
Masahiro Yamada1fe65d32015-09-22 00:27:41 +090091 led_puts("U1");
Masahiro Yamada98905692016-03-30 20:17:02 +090092 uniphier_pxs2_clk_init();
Masahiro Yamada1fe65d32015-09-22 00:27:41 +090093 break;
94#endif
Masahiro Yamada53c59ae2016-03-18 16:41:43 +090095#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
96 case SOC_UNIPHIER_LD6B:
Masahiro Yamada98905692016-03-30 20:17:02 +090097 uniphier_ld6b_pin_init();
Masahiro Yamada1fe65d32015-09-22 00:27:41 +090098 led_puts("U1");
Masahiro Yamada98905692016-03-30 20:17:02 +090099 uniphier_pxs2_clk_init();
Masahiro Yamada1fe65d32015-09-22 00:27:41 +0900100 break;
101#endif
Masahiro Yamada8bbbcbd2016-05-24 21:14:01 +0900102#if defined(CONFIG_ARCH_UNIPHIER_LD11)
103 case SOC_UNIPHIER_LD11:
104 uniphier_ld20_pin_init();
105 led_puts("U1");
106 uniphier_ld11_clk_init();
107 break;
108#endif
Masahiro Yamada063eb1e2016-04-21 14:43:18 +0900109#if defined(CONFIG_ARCH_UNIPHIER_LD20)
110 case SOC_UNIPHIER_LD20:
111 uniphier_ld20_pin_init();
112 led_puts("U1");
113 uniphier_ld20_clk_init();
114 cci500_init(2);
115 break;
116#endif
Masahiro Yamada75f16f82015-09-22 00:27:39 +0900117 default:
118 break;
119 }
Masahiro Yamadac04368f2015-02-27 02:26:51 +0900120
Masahiro Yamada24802562016-06-29 19:39:03 +0900121 uniphier_setup_xirq();
122
Masahiro Yamada4e5d28d2015-09-22 00:27:31 +0900123 led_puts("U2");
Masahiro Yamadac04368f2015-02-27 02:26:51 +0900124
Masahiro Yamada1f3d9c72015-02-05 14:42:54 +0900125 return 0;
126}