blob: 8193afdf6aab34b925307c020df67c18965968e5 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Po Liu37d433d2014-01-10 10:10:59 +08002/* Copyright 2013 Freescale Semiconductor, Inc.
Po Liu37d433d2014-01-10 10:10:59 +08003 */
4
5#include <common.h>
Simon Glass284f71b2019-12-28 10:44:45 -07006#include <init.h>
Po Liu37d433d2014-01-10 10:10:59 +08007#include <mpc85xx.h>
8#include <asm/io.h>
9#include <ns16550.h>
10#include <nand.h>
11#include <asm/mmu.h>
12#include <asm/immap_85xx.h>
13#include <asm/fsl_law.h>
14#include <asm/global_data.h>
15
16DECLARE_GLOBAL_DATA_PTR;
17
18void board_init_f(ulong bootflag)
19{
20 u32 plat_ratio;
21 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
22
23#if defined(CONFIG_SYS_NAND_BR_PRELIM) && defined(CONFIG_SYS_NAND_OR_PRELIM)
24 set_lbc_br(0, CONFIG_SYS_NAND_BR_PRELIM);
25 set_lbc_or(0, CONFIG_SYS_NAND_OR_PRELIM);
26#endif
27
28 /* initialize selected port with appropriate baud rate */
29 plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
30 plat_ratio >>= 1;
31 gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
32
33 NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
34 gd->bus_clk / 16 / CONFIG_BAUDRATE);
35
36 puts("\nNAND boot...\n");
37
38 /* copy code to RAM and jump to it - this should not return */
39 /* NOTE - code has to be copied out of NAND buffer before
40 * other blocks can be read.
41 */
42 relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
43}
44
45void board_init_r(gd_t *gd, ulong dest_addr)
46{
47 puts("SPL\n");
48 nand_boot();
49}
50
51void putc(char c)
52{
53 if (c == '\n')
54 NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r');
55
56 NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c);
57}
58
59void puts(const char *str)
60{
61 while (*str)
62 putc(*str++);
63}