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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Kever Yang441a6d32017-02-23 16:09:05 +08002/*
3 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
Philipp Tomsich7e00d862017-09-11 12:48:12 +02004 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
Kever Yang441a6d32017-02-23 16:09:05 +08005 */
6
7#include <common.h>
Simon Glassf473eba2019-01-21 14:53:31 -07008#include <debug_uart.h>
9#include <dm.h>
10#include <ram.h>
11#include <spl.h>
Simon Glass8fbf9922019-01-21 14:53:36 -070012#include <spl_gpio.h>
Simon Glassf473eba2019-01-21 14:53:31 -070013#include <syscon.h>
Jagan Teki74bde5d2019-06-21 00:25:00 +053014#include <asm/gpio.h>
Simon Glassf473eba2019-01-21 14:53:31 -070015#include <asm/io.h>
Kever Yang9fbe17c2019-03-28 11:01:23 +080016#include <asm/arch-rockchip/bootrom.h>
17#include <asm/arch-rockchip/clock.h>
Jagan Teki74bde5d2019-06-21 00:25:00 +053018#include <asm/arch-rockchip/cru_rk3399.h>
Kever Yang9fbe17c2019-03-28 11:01:23 +080019#include <asm/arch-rockchip/grf_rk3399.h>
20#include <asm/arch-rockchip/hardware.h>
21#include <asm/arch-rockchip/periph.h>
22#include <asm/arch-rockchip/sys_proto.h>
Jagan Teki74bde5d2019-06-21 00:25:00 +053023#include <power/regulator.h>
Kever Yang441a6d32017-02-23 16:09:05 +080024
Philipp Tomsich7e00d862017-09-11 12:48:12 +020025void board_return_to_bootrom(void)
26{
Philipp Tomsich7234c732017-10-10 16:21:16 +020027 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
Philipp Tomsich7e00d862017-09-11 12:48:12 +020028}
29
Philipp Tomsich425e7172017-09-29 19:27:58 +020030static const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
31 [BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
32 [BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000",
33 [BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
34};
35
36const char *board_spl_was_booted_from(void)
37{
38 u32 bootdevice_brom_id = readl(RK3399_BROM_BOOTSOURCE_ID_ADDR);
39 const char *bootdevice_ofpath = NULL;
40
41 if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
42 bootdevice_ofpath = boot_devices[bootdevice_brom_id];
43
44 if (bootdevice_ofpath)
45 debug("%s: brom_bootdevice_id %x maps to '%s'\n",
46 __func__, bootdevice_brom_id, bootdevice_ofpath);
47 else
48 debug("%s: failed to resolve brom_bootdevice_id %x\n",
49 __func__, bootdevice_brom_id);
50
51 return bootdevice_ofpath;
52}
53
Kever Yang441a6d32017-02-23 16:09:05 +080054u32 spl_boot_device(void)
55{
Philipp Tomsich7e00d862017-09-11 12:48:12 +020056 u32 boot_device = BOOT_DEVICE_MMC1;
57
58 if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
59 return BOOT_DEVICE_BOOTROM;
60
61 return boot_device;
Kever Yang441a6d32017-02-23 16:09:05 +080062}
63
Philipp Tomsich2dde6f72018-05-24 17:15:52 +020064const char *spl_decode_boot_device(u32 boot_device)
65{
66 int i;
67 static const struct {
68 u32 boot_device;
69 const char *ofpath;
70 } spl_boot_devices_tbl[] = {
71 { BOOT_DEVICE_MMC1, "/dwmmc@fe320000" },
72 { BOOT_DEVICE_MMC2, "/sdhci@fe330000" },
73 { BOOT_DEVICE_SPI, "/spi@ff1d0000" },
74 };
75
76 for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i)
77 if (spl_boot_devices_tbl[i].boot_device == boot_device)
78 return spl_boot_devices_tbl[i].ofpath;
79
80 return NULL;
81}
82
83void spl_perform_fixups(struct spl_image_info *spl_image)
84{
85 void *blob = spl_image->fdt_addr;
86 const char *boot_ofpath;
87 int chosen;
88
89 /*
90 * Inject the ofpath of the device the full U-Boot (or Linux in
91 * Falcon-mode) was booted from into the FDT, if a FDT has been
92 * loaded at the same time.
93 */
94 if (!blob)
95 return;
96
97 boot_ofpath = spl_decode_boot_device(spl_image->boot_device);
98 if (!boot_ofpath) {
99 pr_err("%s: could not map boot_device to ofpath\n", __func__);
100 return;
101 }
102
103 chosen = fdt_find_or_add_subnode(blob, 0, "chosen");
104 if (chosen < 0) {
105 pr_err("%s: could not find/create '/chosen'\n", __func__);
106 return;
107 }
108 fdt_setprop_string(blob, chosen,
109 "u-boot,spl-boot-device", boot_ofpath);
110}
111
Kever Yange937a992019-07-09 22:05:59 +0800112__weak void rockchip_stimer_init(void)
Kever Yang441a6d32017-02-23 16:09:05 +0800113{
Kever Yang441a6d32017-02-23 16:09:05 +0800114}
115
Philipp Tomsich41029e62017-04-01 12:59:25 +0200116void board_init_f(ulong dummy)
117{
Philipp Tomsich41029e62017-04-01 12:59:25 +0200118 struct udevice *dev;
Philipp Tomsich7deb0982017-08-29 18:24:05 +0200119 struct rk3399_pmusgrf_regs *sgrf;
120 struct rk3399_grf_regs *grf;
Philipp Tomsich41029e62017-04-01 12:59:25 +0200121 int ret;
122
Kever Yang0f7c8242019-03-29 09:09:07 +0800123#ifdef CONFIG_DEBUG_UART
Philipp Tomsichbfd86052019-02-01 16:48:31 +0100124 debug_uart_init();
125
Simon Glass8fbf9922019-01-21 14:53:36 -0700126# ifdef CONFIG_TARGET_CHROMEBOOK_BOB
127 int sum, i;
128
Simon Glass8fbf9922019-01-21 14:53:36 -0700129 /*
130 * Add a delay and ensure that the compiler does not optimise this out.
131 * This is needed since the power rails tail a while to turn on, and
132 * we get garbage serial output otherwise.
133 */
134 sum = 0;
135 for (i = 0; i < 150000; i++)
136 sum += i;
137 gru_dummy_function(sum);
138#endif /* CONFIG_TARGET_CHROMEBOOK_BOB */
139
Kever Yang441a6d32017-02-23 16:09:05 +0800140 /*
141 * Debug UART can be used from here if required:
142 *
143 * debug_uart_init();
144 * printch('a');
145 * printhex8(0x1234);
146 * printascii("string");
147 */
Jagan Teki552d2812019-06-21 00:25:01 +0530148 debug("U-Boot SPL board init\n");
Kever Yang441a6d32017-02-23 16:09:05 +0800149#endif
Kever Yanga6697732017-05-05 11:01:43 +0800150
Kever Yange603a3d2017-03-20 14:47:16 +0800151 ret = spl_early_init();
Kever Yang441a6d32017-02-23 16:09:05 +0800152 if (ret) {
Kever Yange603a3d2017-03-20 14:47:16 +0800153 debug("spl_early_init() failed: %d\n", ret);
Kever Yang441a6d32017-02-23 16:09:05 +0800154 hang();
155 }
156
Philipp Tomsich2a34cbb2017-03-29 21:20:28 +0200157 /*
Kever Yanga6697732017-05-05 11:01:43 +0800158 * Disable DDR and SRAM security regions.
Philipp Tomsich2a34cbb2017-03-29 21:20:28 +0200159 *
160 * As we are entered from the BootROM, the region from
161 * 0x0 through 0xfffff (i.e. the first MB of memory) will
162 * be protected. This will cause issues with the DW_MMC
163 * driver, which tries to DMA from/to the stack (likely)
164 * located in this range.
165 */
Philipp Tomsich7deb0982017-08-29 18:24:05 +0200166 sgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF);
167 rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0);
168 rk_clrreg(&sgrf->slv_secure_con4, 0x2000);
169
170 /* eMMC clock generator: disable the clock multipilier */
171 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
172 rk_clrreg(&grf->emmccore_con[11], 0x0ff);
Philipp Tomsich2a34cbb2017-03-29 21:20:28 +0200173
Kever Yange937a992019-07-09 22:05:59 +0800174 rockchip_stimer_init();
Kever Yang441a6d32017-02-23 16:09:05 +0800175
Kever Yang441a6d32017-02-23 16:09:05 +0800176 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
177 if (ret) {
Philipp Tomsichc03a36c2018-11-19 13:03:51 +0100178 pr_err("DRAM init failed: %d\n", ret);
Kever Yang441a6d32017-02-23 16:09:05 +0800179 return;
180 }
181}
182
Jagan Teki74bde5d2019-06-21 00:25:00 +0530183#if defined(SPL_GPIO_SUPPORT)
184static void rk3399_force_power_on_reset(void)
185{
186 ofnode node;
187 struct gpio_desc sysreset_gpio;
188
189 debug("%s: trying to force a power-on reset\n", __func__);
190
191 node = ofnode_path("/config");
192 if (!ofnode_valid(node)) {
193 debug("%s: no /config node?\n", __func__);
194 return;
195 }
196
197 if (gpio_request_by_name_nodev(node, "sysreset-gpio", 0,
198 &sysreset_gpio, GPIOD_IS_OUT)) {
199 debug("%s: could not find a /config/sysreset-gpio\n", __func__);
200 return;
201 }
202
203 dm_gpio_set_value(&sysreset_gpio, 1);
204}
205#endif
206
207void spl_board_init(void)
208{
209#if defined(SPL_GPIO_SUPPORT)
210 struct rk3399_cru *cru = rockchip_get_cru();
211
212 /*
213 * The RK3399 resets only 'almost all logic' (see also in the TRM
214 * "3.9.4 Global software reset"), when issuing a software reset.
215 * This may cause issues during boot-up for some configurations of
216 * the application software stack.
217 *
218 * To work around this, we test whether the last reset reason was
219 * a power-on reset and (if not) issue an overtemp-reset to reset
220 * the entire module.
221 *
222 * While this was previously fixed by modifying the various places
223 * that could generate a software reset (e.g. U-Boot's sysreset
224 * driver, the ATF or Linux), we now have it here to ensure that
225 * we no longer have to track this through the various components.
226 */
227 if (cru->glb_rst_st != 0)
228 rk3399_force_power_on_reset();
229#endif
230
231#if defined(SPL_DM_REGULATOR)
232 /*
233 * Turning the eMMC and SPI back on (if disabled via the Qseven
234 * BIOS_ENABLE) signal is done through a always-on regulator).
235 */
236 if (regulators_enable_boot_on(false))
237 debug("%s: Cannot enable boot on regulator\n", __func__);
238#endif
239
240 preloader_console_init();
241}
242
Kever Yang441a6d32017-02-23 16:09:05 +0800243#ifdef CONFIG_SPL_LOAD_FIT
244int board_fit_config_name_match(const char *name)
245{
246 /* Just empty function now - can't decide what to choose */
247 debug("%s: %s\n", __func__, name);
248
249 return 0;
250}
251#endif