Simon Glass | e42bff5 | 2020-09-22 12:44:48 -0600 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright (C) 2016 Intel Corp. |
| 4 | * (Written by Lance Zhao <lijian.zhao@intel.com> for Intel Corp.) |
| 5 | */ |
| 6 | |
| 7 | #include <p2sb.h> |
| 8 | #include <asm/arch/gpe.h> |
| 9 | |
| 10 | /* PCIE device */ |
| 11 | #include "pcie.asl" |
| 12 | |
| 13 | /* LPSS device */ |
| 14 | #include "lpss.asl" |
| 15 | |
| 16 | /* PCI IRQ assignment */ |
| 17 | #include "pci_irqs.asl" |
| 18 | |
| 19 | /* GPIO controller */ |
| 20 | #include "gpio.asl" |
| 21 | |
| 22 | #include "xhci.asl" |
| 23 | |
| 24 | /* LPC */ |
| 25 | #include <asm/acpi/lpc.asl> |
| 26 | |
| 27 | /* eMMC */ |
| 28 | #include "scs.asl" |
| 29 | |
| 30 | /* PMC IPC controller */ |
| 31 | #include "pmc_ipc.asl" |
| 32 | |
| 33 | /* PCI _OSC */ |
| 34 | #include <asm/acpi/pci_osc.asl> |