blob: a4c2627f974149b3febf9605da77c3d34b66830d [file] [log] [blame]
Peng Fan941ba8e2016-11-28 17:49:47 +08001/*
2 * Copyright (C) 2014 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/dts-v1/;
10
11#include "imx6sx.dtsi"
12
13/ {
14 model = "Freescale i.MX6 SoloX Sabre Auto Board";
15 compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx";
16
17 memory {
18 reg = <0x80000000 0x80000000>;
19 };
20
21 regulators {
22 compatible = "simple-bus";
23 #address-cells = <1>;
24 #size-cells = <0>;
25
26 vcc_sd3: regulator@0 {
27 compatible = "regulator-fixed";
28 reg = <0>;
29 pinctrl-names = "default";
30 pinctrl-0 = <&pinctrl_vcc_sd3>;
31 regulator-name = "VCC_SD3";
32 regulator-min-microvolt = <3000000>;
33 regulator-max-microvolt = <3000000>;
34 gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
35 enable-active-high;
36 };
37 };
38};
39
40&uart1 {
41 pinctrl-names = "default";
42 pinctrl-0 = <&pinctrl_uart1>;
43 status = "okay";
44};
45
46&usdhc3 {
47 pinctrl-names = "default", "state_100mhz", "state_200mhz";
48 pinctrl-0 = <&pinctrl_usdhc3>;
49 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
50 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
51 bus-width = <8>;
52 cd-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
53 wp-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
54 keep-power-in-suspend;
55 wakeup-source;
56 vmmc-supply = <&vcc_sd3>;
57 status = "okay";
58};
59
60&usdhc4 {
61 pinctrl-names = "default";
62 pinctrl-0 = <&pinctrl_usdhc4>;
63 bus-width = <8>;
64 cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>;
65 no-1-8-v;
66 keep-power-in-suspend;
67 wakeup-source;
68 status = "okay";
69};
70
Peng Fanedaf59c2016-11-28 17:49:49 +080071&i2c2 {
72 clock-frequency = <100000>;
73 pinctrl-names = "default";
74 pinctrl-0 = <&pinctrl_i2c2_1>;
75 status = "okay";
76};
77
78&i2c3 {
79 clock-frequency = <100000>;
80 pinctrl-names = "default";
81 pinctrl-0 = <&pinctrl_i2c3_2>;
82 status = "okay";
83
84 max7310_a: gpio@30 {
85 compatible = "maxim,max7310";
86 reg = <0x30>;
87 gpio-controller;
88 #gpio-cells = <2>;
89 };
90
91 max7310_b: gpio@32 {
92 compatible = "maxim,max7310";
93 reg = <0x32>;
94 gpio-controller;
95 #gpio-cells = <2>;
96 };
97};
98
Peng Fan941ba8e2016-11-28 17:49:47 +080099&iomuxc {
100 imx6x-sabreauto {
Peng Fanedaf59c2016-11-28 17:49:49 +0800101 pinctrl_i2c2_1: i2c2grp-1 {
102 fsl,pins = <
103 MX6SX_PAD_GPIO1_IO03__I2C2_SDA 0x4001b8b1
104 MX6SX_PAD_GPIO1_IO02__I2C2_SCL 0x4001b8b1
105 >;
106 };
107
108 pinctrl_i2c3_2: i2c3grp-2 {
109 fsl,pins = <
110 MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1
111 MX6SX_PAD_KEY_COL4__I2C3_SCL 0x4001b8b1
112 >;
113 };
114
Peng Fan941ba8e2016-11-28 17:49:47 +0800115 pinctrl_uart1: uart1grp {
116 fsl,pins = <
117 MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1
118 MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1
119 >;
120 };
121
122 pinctrl_usdhc3: usdhc3grp {
123 fsl,pins = <
124 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059
125 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059
126 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059
127 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059
128 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059
129 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059
130 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059
131 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059
132 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059
133 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059
134 MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */
135 MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */
136 >;
137 };
138
139 pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
140 fsl,pins = <
141 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170b9
142 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100b9
143 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170b9
144 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170b9
145 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170b9
146 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170b9
147 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170b9
148 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170b9
149 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170b9
150 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170b9
151 >;
152 };
153
154 pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
155 fsl,pins = <
156 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170f9
157 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100f9
158 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170f9
159 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170f9
160 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170f9
161 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170f9
162 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170f9
163 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170f9
164 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170f9
165 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170f9
166 >;
167 };
168
169 pinctrl_usdhc4: usdhc4grp {
170 fsl,pins = <
171 MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059
172 MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059
173 MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059
174 MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059
175 MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059
176 MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059
177 MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 /* CD */
178 MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */
179 >;
180 };
181
182 pinctrl_vcc_sd3: vccsd3grp {
183 fsl,pins = <
184 MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059
185 >;
186 };
187 };
188};