blob: c57e518c33fe6114d7fa2533cd15e4b83d3a40db [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001# SPDX-License-Identifier: GPL-2.0+
Bin Meng03b341b2015-04-27 23:22:24 +08002#
3# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
Bin Meng03b341b2015-04-27 23:22:24 +08004
5if VENDOR_GOOGLE
6
Tom Rini8f1a0402022-02-25 11:19:45 -05007config BIOSEMU
8 bool
9
Bin Meng03b341b2015-04-27 23:22:24 +080010choice
11 prompt "Mainboard model"
Joe Hershbergerf0699602015-05-12 14:46:23 -050012 optional
Bin Meng03b341b2015-04-27 23:22:24 +080013
Simon Glass124602a2019-12-08 17:40:20 -070014config TARGET_CHROMEBOOK_CORAL
15 bool "Chromebook coral"
Tom Rini8f1a0402022-02-25 11:19:45 -050016 select BIOSEMU
Simon Glass124602a2019-12-08 17:40:20 -070017 help
18 This is a range of Intel-based laptops released in 2018. They use an
19 Intel Apollo Lake SoC. The design supports WiFi, 4GB to 16GB of
20 LPDDR4 1600MHz SDRAM, PCIe WiFi and Bluetooth, eMMC (typically 32GB),
21 up two cameras (front-facing 720p and another 5MP option), USB SD
22 reader, microphone and speakers. It also includes two USB 3 Type A and
23 two Type C ports. The latter are used as power input and can also
24 charge external devices as well as a 4K external display. There is a
25 Chrome OS EC connected on LPC, a Cr50 secure chip from Google and
26 various display options. OEMs products include Acer Chromebook 11
27 (e.g. C732, CB11, CP311) and Lenovo Chromebook (100e, 300e, 500e).
28
Bin Meng03b341b2015-04-27 23:22:24 +080029config TARGET_CHROMEBOOK_LINK
30 bool "Chromebook link"
Tom Rini8f1a0402022-02-25 11:19:45 -050031 select BIOSEMU
Bin Meng03b341b2015-04-27 23:22:24 +080032 help
33 This is the Chromebook Pixel released in 2013. It uses an Intel
34 i5 Ivybridge which is a die-shrink of Sandybridge, with 4GB of
35 SDRAM. It has a Panther Point platform controller hub, PCIe
36 WiFi and Bluetooth. It also includes a 720p webcam, USB SD
37 reader, microphone and speakers, display port and 32GB SATA
38 solid state drive. There is a Chrome OS EC connected on LPC,
39 and it provides a 2560x1700 high resolution touch-enabled LCD
40 display.
41
Simon Glass446e56a2017-01-16 07:04:27 -070042config TARGET_CHROMEBOOK_LINK64
43 bool "Chromebook link 64-bit"
Tom Rini8f1a0402022-02-25 11:19:45 -050044 select BIOSEMU
Simon Glass446e56a2017-01-16 07:04:27 -070045 help
46 This is the Chromebook Pixel released in 2013. With this config
47 U-Boot is built as a 64-bit binary. This allows testing while this
48 feature is being completed.
49
Bin Meng03b341b2015-04-27 23:22:24 +080050config TARGET_CHROMEBOX_PANTHER
51 bool "Chromebox panther (not available)"
Tom Rini8f1a0402022-02-25 11:19:45 -050052 select BIOSEMU
Bin Meng03b341b2015-04-27 23:22:24 +080053 help
54 Note: At present this must be used with coreboot. See README.x86
55 for instructions.
56
57 This is the Asus Chromebox CN60 released in 2014. It uses an Intel
58 Haswell Celeron 2955U Dual Core CPU with 2GB of SDRAM. It has a
59 Lynx Point platform controller hub, PCIe WiFi and Bluetooth. It also
60 includes a USB SD reader, four USB3 ports, display port and HDMI
61 video output and a 16GB SATA solid state drive. There is no Chrome
62 OS EC on this model.
63
Simon Glassa0b09612016-03-16 07:44:43 -060064config TARGET_CHROMEBOOK_SAMUS
65 bool "Chromebook samus"
66 help
67 This is the Chromebook Pixel released in 2015. It uses an Intel
68 Broadwell U Core i5 or Core i7 CPU with either 8GB or 16GB of
69 LPDDR3 SDRAM. It has PCIe WiFi and Bluetooth. It also includes a
70 720p webcam, USB SD reader, microphone and speakers, 2 USB 3 Type
71 C ports which can support charging and up to a 4K external display.
72 There is a solid state drive, either 32GB or 64GB. There is a
73 Chrome OS EC connected on LPC, and it provides a 2560x1700 high
74 resolution touch-enabled LCD display.
75
Simon Glass8e445782019-05-07 21:41:16 -060076config TARGET_CHROMEBOOK_SAMUS_TPL
77 bool "Chromebook samus booting from TPL"
78 help
79 This is a version of Samus which boots into TPL, then to SPL and
80 U-Boot proper. This is useful where verified boot must select
81 between different A/B versions of SPL/U-Boot, to allow upgrading of
82 almost all U-Boot code in the field.
83
Bin Meng03b341b2015-04-27 23:22:24 +080084endchoice
85
Simon Glass124602a2019-12-08 17:40:20 -070086source "board/google/chromebook_coral/Kconfig"
Bin Meng03b341b2015-04-27 23:22:24 +080087source "board/google/chromebook_link/Kconfig"
88source "board/google/chromebox_panther/Kconfig"
Simon Glassa0b09612016-03-16 07:44:43 -060089source "board/google/chromebook_samus/Kconfig"
Bin Meng03b341b2015-04-27 23:22:24 +080090
91endif