Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: BSD-3-Clause */ |
Pavel Machek | c721380 | 2014-09-08 14:08:45 +0200 | [diff] [blame] | 2 | /* |
Tien Fong Chee | 31e50f4 | 2017-07-26 13:05:38 +0800 | [diff] [blame] | 3 | * Copyright (C) 2012-2017 Altera Corporation <www.altera.com> |
Pavel Machek | c721380 | 2014-09-08 14:08:45 +0200 | [diff] [blame] | 4 | * All rights reserved. |
Pavel Machek | c721380 | 2014-09-08 14:08:45 +0200 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef _FPGA_MANAGER_H_ |
| 8 | #define _FPGA_MANAGER_H_ |
| 9 | |
| 10 | #include <altera.h> |
| 11 | |
Tien Fong Chee | 31e50f4 | 2017-07-26 13:05:38 +0800 | [diff] [blame] | 12 | #if defined(CONFIG_TARGET_SOCFPGA_GEN5) |
| 13 | #include <asm/arch/fpga_manager_gen5.h> |
Tien Fong Chee | 1d675f3 | 2017-07-26 13:05:43 +0800 | [diff] [blame] | 14 | #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) |
| 15 | #include <asm/arch/fpga_manager_arria10.h> |
Tien Fong Chee | 31e50f4 | 2017-07-26 13:05:38 +0800 | [diff] [blame] | 16 | #endif |
Pavel Machek | c721380 | 2014-09-08 14:08:45 +0200 | [diff] [blame] | 17 | |
| 18 | /* FPGA CD Ratio Value */ |
| 19 | #define CDRATIO_x1 0x0 |
| 20 | #define CDRATIO_x2 0x1 |
| 21 | #define CDRATIO_x4 0x2 |
| 22 | #define CDRATIO_x8 0x3 |
| 23 | |
Tien Fong Chee | 31e50f4 | 2017-07-26 13:05:38 +0800 | [diff] [blame] | 24 | #ifndef __ASSEMBLY__ |
| 25 | |
| 26 | /* Common prototypes */ |
Pavel Machek | c721380 | 2014-09-08 14:08:45 +0200 | [diff] [blame] | 27 | int fpgamgr_get_mode(void); |
Tien Fong Chee | 31e50f4 | 2017-07-26 13:05:38 +0800 | [diff] [blame] | 28 | int fpgamgr_poll_fpga_ready(void); |
| 29 | void fpgamgr_program_write(const void *rbf_data, size_t rbf_size); |
| 30 | int fpgamgr_test_fpga_ready(void); |
| 31 | int fpgamgr_dclkcnt_set(unsigned long cnt); |
Pavel Machek | c721380 | 2014-09-08 14:08:45 +0200 | [diff] [blame] | 32 | |
Tien Fong Chee | 31e50f4 | 2017-07-26 13:05:38 +0800 | [diff] [blame] | 33 | #endif /* __ASSEMBLY__ */ |
Pavel Machek | c721380 | 2014-09-08 14:08:45 +0200 | [diff] [blame] | 34 | #endif /* _FPGA_MANAGER_H_ */ |