blob: 44e11bd56c5dd6c9d6799f1941ee199fa9348eff [file] [log] [blame]
Bin Meng8a8694d2018-09-26 06:55:21 -07001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
4 */
5
6#include <common.h>
7#include <fdtdec.h>
Simon Glass6980b6b2019-11-14 12:57:45 -07008#include <init.h>
Simon Glass3ba929a2020-10-30 21:38:53 -06009#include <asm/global_data.h>
Anup Patel0bbe9cf2019-02-25 08:14:30 +000010#include <linux/sizes.h>
11
12DECLARE_GLOBAL_DATA_PTR;
Bin Meng8a8694d2018-09-26 06:55:21 -070013
14int dram_init(void)
15{
16 return fdtdec_setup_mem_size_base();
17}
18
19int dram_init_banksize(void)
20{
21 return fdtdec_setup_memory_banksize();
22}
Anup Patel0bbe9cf2019-02-25 08:14:30 +000023
Pali Rohár4f4f5832022-09-09 17:32:40 +020024phys_size_t board_get_usable_ram_top(phys_size_t total_size)
Anup Patel0bbe9cf2019-02-25 08:14:30 +000025{
Anup Patel0bbe9cf2019-02-25 08:14:30 +000026 /*
27 * Ensure that we run from first 4GB so that all
28 * addresses used by U-Boot are 32bit addresses.
29 *
30 * This in-turn ensures that 32bit DMA capable
31 * devices work fine because DMA mapping APIs will
32 * provide 32bit DMA addresses only.
33 */
Bin Meng489b25a2021-01-31 20:35:57 +080034 if (gd->ram_top >= SZ_4G)
35 return SZ_4G - 1;
36
Anup Patel0bbe9cf2019-02-25 08:14:30 +000037 return gd->ram_top;
38}