Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Shengzhou Liu | 11ff48a | 2014-04-18 16:43:40 +0800 | [diff] [blame] | 2 | /* Copyright 2013 Freescale Semiconductor, Inc. |
Shengzhou Liu | 11ff48a | 2014-04-18 16:43:40 +0800 | [diff] [blame] | 3 | */ |
| 4 | |
| 5 | #include <common.h> |
Simon Glass | 85d6531 | 2019-12-28 10:44:58 -0700 | [diff] [blame] | 6 | #include <clock_legacy.h> |
Simon Glass | a73bda4 | 2015-11-08 23:47:45 -0700 | [diff] [blame] | 7 | #include <console.h> |
Simon Glass | 9d1f619 | 2019-08-02 09:44:25 -0600 | [diff] [blame] | 8 | #include <env_internal.h> |
Simon Glass | 284f71b | 2019-12-28 10:44:45 -0700 | [diff] [blame] | 9 | #include <init.h> |
Shengzhou Liu | 11ff48a | 2014-04-18 16:43:40 +0800 | [diff] [blame] | 10 | #include <malloc.h> |
| 11 | #include <ns16550.h> |
| 12 | #include <nand.h> |
| 13 | #include <i2c.h> |
| 14 | #include <mmc.h> |
| 15 | #include <fsl_esdhc.h> |
| 16 | #include <spi_flash.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 17 | #include <asm/global_data.h> |
Simon Glass | dd8e224 | 2016-09-24 18:20:10 -0600 | [diff] [blame] | 18 | #include "../common/spl.h" |
Shengzhou Liu | 11ff48a | 2014-04-18 16:43:40 +0800 | [diff] [blame] | 19 | |
| 20 | DECLARE_GLOBAL_DATA_PTR; |
| 21 | |
| 22 | phys_size_t get_effective_memsize(void) |
| 23 | { |
| 24 | return CONFIG_SYS_L3_SIZE; |
| 25 | } |
| 26 | |
| 27 | unsigned long get_board_sys_clk(void) |
| 28 | { |
| 29 | return CONFIG_SYS_CLK_FREQ; |
| 30 | } |
| 31 | |
Shengzhou Liu | 11ff48a | 2014-04-18 16:43:40 +0800 | [diff] [blame] | 32 | void board_init_f(ulong bootflag) |
| 33 | { |
| 34 | u32 plat_ratio, sys_clk, ccb_clk; |
| 35 | ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; |
| 36 | |
| 37 | /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */ |
| 38 | memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t)); |
| 39 | |
| 40 | /* Update GD pointer */ |
| 41 | gd = (gd_t *)(CONFIG_SPL_GD_ADDR); |
| 42 | |
| 43 | console_init_f(); |
| 44 | |
| 45 | /* initialize selected port with appropriate baud rate */ |
| 46 | sys_clk = get_board_sys_clk(); |
| 47 | plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f; |
| 48 | ccb_clk = sys_clk * plat_ratio / 2; |
| 49 | |
Simon Glass | 2b92398 | 2020-12-22 19:30:19 -0700 | [diff] [blame] | 50 | ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, |
Shengzhou Liu | 11ff48a | 2014-04-18 16:43:40 +0800 | [diff] [blame] | 51 | ccb_clk / 16 / CONFIG_BAUDRATE); |
| 52 | |
| 53 | #if defined(CONFIG_SPL_MMC_BOOT) |
| 54 | puts("\nSD boot...\n"); |
| 55 | #elif defined(CONFIG_SPL_SPI_BOOT) |
| 56 | puts("\nSPI boot...\n"); |
| 57 | #elif defined(CONFIG_SPL_NAND_BOOT) |
| 58 | puts("\nNAND boot...\n"); |
| 59 | #endif |
| 60 | |
| 61 | relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0); |
| 62 | } |
| 63 | |
| 64 | void board_init_r(gd_t *gd, ulong dest_addr) |
| 65 | { |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 66 | struct bd_info *bd; |
Shengzhou Liu | 11ff48a | 2014-04-18 16:43:40 +0800 | [diff] [blame] | 67 | |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 68 | bd = (struct bd_info *)(gd + sizeof(gd_t)); |
| 69 | memset(bd, 0, sizeof(struct bd_info)); |
Shengzhou Liu | 11ff48a | 2014-04-18 16:43:40 +0800 | [diff] [blame] | 70 | gd->bd = bd; |
Shengzhou Liu | 11ff48a | 2014-04-18 16:43:40 +0800 | [diff] [blame] | 71 | |
Simon Glass | 302445a | 2017-01-23 13:31:22 -0700 | [diff] [blame] | 72 | arch_cpu_init(); |
Shengzhou Liu | 11ff48a | 2014-04-18 16:43:40 +0800 | [diff] [blame] | 73 | get_clocks(); |
| 74 | mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, |
| 75 | CONFIG_SPL_RELOC_MALLOC_SIZE); |
Sumit Garg | 2ff056b | 2016-05-25 12:41:48 -0400 | [diff] [blame] | 76 | gd->flags |= GD_FLG_FULL_MALLOC_INIT; |
Shengzhou Liu | 11ff48a | 2014-04-18 16:43:40 +0800 | [diff] [blame] | 77 | |
| 78 | #ifdef CONFIG_SPL_NAND_BOOT |
| 79 | nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, |
Tom Rini | 5cd7ece | 2019-11-18 20:02:10 -0500 | [diff] [blame] | 80 | (uchar *)SPL_ENV_ADDR); |
Shengzhou Liu | 11ff48a | 2014-04-18 16:43:40 +0800 | [diff] [blame] | 81 | #endif |
| 82 | #ifdef CONFIG_SPL_MMC_BOOT |
| 83 | mmc_initialize(bd); |
| 84 | mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, |
Tom Rini | 5cd7ece | 2019-11-18 20:02:10 -0500 | [diff] [blame] | 85 | (uchar *)SPL_ENV_ADDR); |
Shengzhou Liu | 11ff48a | 2014-04-18 16:43:40 +0800 | [diff] [blame] | 86 | #endif |
| 87 | #ifdef CONFIG_SPL_SPI_BOOT |
Simon Glass | dd8e224 | 2016-09-24 18:20:10 -0600 | [diff] [blame] | 88 | fsl_spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, |
Tom Rini | 5cd7ece | 2019-11-18 20:02:10 -0500 | [diff] [blame] | 89 | (uchar *)SPL_ENV_ADDR); |
Shengzhou Liu | 11ff48a | 2014-04-18 16:43:40 +0800 | [diff] [blame] | 90 | #endif |
| 91 | |
Tom Rini | 5cd7ece | 2019-11-18 20:02:10 -0500 | [diff] [blame] | 92 | gd->env_addr = (ulong)(SPL_ENV_ADDR); |
Simon Glass | 4bc2ad2 | 2017-08-03 12:21:56 -0600 | [diff] [blame] | 93 | gd->env_valid = ENV_VALID; |
Shengzhou Liu | 11ff48a | 2014-04-18 16:43:40 +0800 | [diff] [blame] | 94 | |
| 95 | i2c_init_all(); |
| 96 | |
Simon Glass | d35f338 | 2017-04-06 12:47:05 -0600 | [diff] [blame] | 97 | dram_init(); |
Shengzhou Liu | 11ff48a | 2014-04-18 16:43:40 +0800 | [diff] [blame] | 98 | |
| 99 | #ifdef CONFIG_SPL_MMC_BOOT |
| 100 | mmc_boot(); |
| 101 | #elif defined(CONFIG_SPL_SPI_BOOT) |
Simon Glass | dd8e224 | 2016-09-24 18:20:10 -0600 | [diff] [blame] | 102 | fsl_spi_boot(); |
Shengzhou Liu | 11ff48a | 2014-04-18 16:43:40 +0800 | [diff] [blame] | 103 | #elif defined(CONFIG_SPL_NAND_BOOT) |
| 104 | nand_boot(); |
| 105 | #endif |
| 106 | } |