Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Samsung Exynos5433 TM2 board device tree source |
| 4 | * |
| 5 | * Copyright (c) 2016 Samsung Electronics Co., Ltd. |
| 6 | * |
| 7 | * Device tree source file for Samsung's TM2 board which is based on |
| 8 | * Samsung Exynos5433 SoC. |
| 9 | */ |
| 10 | |
| 11 | #include "exynos5433-tm2-common.dtsi" |
| 12 | |
| 13 | / { |
| 14 | model = "Samsung TM2 board"; |
| 15 | compatible = "samsung,tm2", "samsung,exynos5433"; |
| 16 | chassis-type = "handset"; |
| 17 | }; |
| 18 | |
| 19 | &cmu_disp { |
| 20 | /* |
| 21 | * TM2 and TM2e differ only by DISP_PLL rate, but define all assigned |
| 22 | * clocks properties for DISP CMU for each board to keep them together |
| 23 | * for easier review and maintenance. |
| 24 | */ |
| 25 | assigned-clocks = <&cmu_disp CLK_FOUT_DISP_PLL>, |
| 26 | <&cmu_mif CLK_DIV_SCLK_DECON_TV_ECLK>, |
| 27 | <&cmu_disp CLK_MOUT_ACLK_DISP_333_USER>, |
| 28 | <&cmu_disp CLK_MOUT_SCLK_DSIM0_USER>, |
| 29 | <&cmu_disp CLK_MOUT_SCLK_DSIM0>, |
| 30 | <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK_USER>, |
| 31 | <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK>, |
| 32 | <&cmu_disp CLK_MOUT_PHYCLK_MIPIDPHY0_RXCLKESC0_USER>, |
| 33 | <&cmu_disp CLK_MOUT_PHYCLK_MIPIDPHY0_BITCLKDIV8_USER>, |
| 34 | <&cmu_disp CLK_MOUT_DISP_PLL>, |
| 35 | <&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>, |
| 36 | <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>, |
| 37 | <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>, |
| 38 | <&cmu_disp CLK_MOUT_SCLK_DSD_USER>; |
| 39 | assigned-clock-parents = <0>, <0>, |
| 40 | <&cmu_mif CLK_ACLK_DISP_333>, |
| 41 | <&cmu_mif CLK_SCLK_DSIM0_DISP>, |
| 42 | <&cmu_disp CLK_MOUT_SCLK_DSIM0_USER>, |
| 43 | <&cmu_mif CLK_SCLK_DECON_ECLK_DISP>, |
| 44 | <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK_USER>, |
| 45 | <&cmu_disp CLK_PHYCLK_MIPIDPHY0_RXCLKESC0_PHY>, |
| 46 | <&cmu_disp CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8_PHY>, |
| 47 | <&cmu_disp CLK_FOUT_DISP_PLL>, |
| 48 | <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>, |
| 49 | <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>, |
| 50 | <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>, |
| 51 | <&cmu_mif CLK_SCLK_DSD_DISP>; |
| 52 | assigned-clock-rates = <250000000>, <400000000>; |
| 53 | }; |
| 54 | |
| 55 | &dsi { |
| 56 | panel@0 { |
| 57 | compatible = "samsung,s6e3ha2"; |
| 58 | reg = <0>; |
| 59 | vdd3-supply = <&ldo27_reg>; |
| 60 | vci-supply = <&ldo28_reg>; |
| 61 | reset-gpios = <&gpg0 0 GPIO_ACTIVE_LOW>; |
| 62 | enable-gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>; |
| 63 | }; |
| 64 | }; |
| 65 | |
| 66 | &hsi2c_9 { |
| 67 | status = "okay"; |
| 68 | |
| 69 | touchkey@20 { |
| 70 | compatible = "cypress,tm2-touchkey"; |
| 71 | reg = <0x20>; |
| 72 | interrupt-parent = <&gpa3>; |
| 73 | interrupts = <2 IRQ_TYPE_EDGE_FALLING>; |
| 74 | vcc-supply = <&ldo32_reg>; |
| 75 | vdd-supply = <&ldo33_reg>; |
| 76 | }; |
| 77 | }; |
| 78 | |
| 79 | &ldo31_reg { |
| 80 | regulator-name = "TSP_VDD_1.85V_AP"; |
| 81 | regulator-min-microvolt = <1850000>; |
| 82 | regulator-max-microvolt = <1850000>; |
| 83 | }; |
| 84 | |
| 85 | &ldo38_reg { |
| 86 | regulator-name = "VCC_3.0V_MOTOR_AP"; |
| 87 | regulator-min-microvolt = <3000000>; |
| 88 | regulator-max-microvolt = <3000000>; |
| 89 | }; |
| 90 | |
| 91 | &stmfts { |
| 92 | touchscreen-size-x = <1439>; |
| 93 | touchscreen-size-y = <2559>; |
| 94 | }; |