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git01.mediatek.com / filogic / uboot / e7d67a4d71ee5e1bab66640f7205c775f18164d4 / . / configs / helios4_defconfig
blob: 626469eb524f47dc4bd1429c3bf808854a796eef [file] [log] [blame]
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]1CONFIG_ARM=y
Adam Fordd36b1022019-08-14 08:29:25 -0500[diff] [blame]2CONFIG_ARCH_CPU_INIT=y
Dennis Gilmoref08364f2020-06-27 15:00:16 -0500[diff] [blame]3CONFIG_SYS_THUMB_BUILD=y
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]4CONFIG_ARCH_MVEBU=y
5CONFIG_SYS_TEXT_BASE=0x00800000
6CONFIG_SPL_LIBCOMMON_SUPPORT=y
7CONFIG_SPL_LIBGENERIC_SUPPORT=y
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]8CONFIG_NR_DRAM_BANKS=2
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]9CONFIG_TARGET_HELIOS4=y
Baruch Siachea3d9de2018-06-18 21:56:25 +0300[diff] [blame]10CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC=y
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]11CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]12CONFIG_DEFAULT_DEVICE_TREE="armada-388-helios4"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]13CONFIG_SPL_TEXT_BASE=0x40000030
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]14CONFIG_SPL_SERIAL=y
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]15CONFIG_SPL=y
Pali Rohár40954732022-05-09 20:17:07 +0200[diff] [blame]16CONFIG_DEBUG_UART_BASE=0xf1012000
Tom Riniecbc80e2018-07-09 15:13:08 -0400[diff] [blame]17CONFIG_DEBUG_UART_CLOCK=250000000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]18CONFIG_SYS_LOAD_ADDR=0x800000
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]19CONFIG_DEBUG_UART=y
Tom Riniecbc80e2018-07-09 15:13:08 -0400[diff] [blame]20CONFIG_AHCI=y
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]21CONFIG_DISTRO_DEFAULTS=y
22CONFIG_BOOTDELAY=3
Simon Glass4be229d2019-07-20 20:51:14 -0600[diff] [blame]23CONFIG_USE_PREBOOT=y
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]24CONFIG_SYS_CONSOLE_INFO_QUIET=y
25# CONFIG_DISPLAY_BOARDINFO is not set
26CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]27CONFIG_SPL_MAX_SIZE=0x22fd0
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]28CONFIG_SPL_BSS_MAX_SIZE=0x4000
Tom Rinie7d67a42022-05-20 12:36:05 -0400[diff] [blame^]29CONFIG_SPL_SYS_MALLOC_SIMPLE=y
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]30CONFIG_SPL_I2C=y
Tom Riniba5c2b02022-05-11 16:21:06 -0400[diff] [blame]31CONFIG_SYS_MAXARGS=32
Dennis Gilmoref08364f2020-06-27 15:00:16 -0500[diff] [blame]32CONFIG_CMD_TLV_EEPROM=y
33CONFIG_SPL_CMD_TLV_EEPROM=y
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]34# CONFIG_CMD_FLASH is not set
Aditya Prayoga060ccce2018-12-05 00:57:22 +0800[diff] [blame]35CONFIG_CMD_GPIO=y
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]36CONFIG_CMD_I2C=y
37CONFIG_CMD_MMC=y
Dennis Gilmoref08364f2020-06-27 15:00:16 -0500[diff] [blame]38CONFIG_CMD_PCI=y
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]39CONFIG_CMD_SPI=y
40CONFIG_CMD_USB=y
41# CONFIG_CMD_SETEXPR is not set
42CONFIG_CMD_TFTPPUT=y
43CONFIG_CMD_CACHE=y
44CONFIG_CMD_TIME=y
Dennis Gilmoref08364f2020-06-27 15:00:16 -0500[diff] [blame]45CONFIG_CMD_MVEBU_BUBT=y
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]46# CONFIG_SPL_PARTITION_UUIDS is not set
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]47CONFIG_ENV_OVERWRITE=y
Tom Rinia8a77502022-03-11 09:12:01 -0500[diff] [blame]48CONFIG_ARP_TIMEOUT=200
Tom Rini26011a32022-03-11 09:12:02 -0500[diff] [blame]49CONFIG_NET_RETRY_COUNT=50
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]50CONFIG_NET_RANDOM_ETHADDR=y
51CONFIG_SPL_OF_TRANSLATE=y
Dennis Gilmoref08364f2020-06-27 15:00:16 -0500[diff] [blame]52CONFIG_AHCI_MVEBU=y
Aditya Prayoga8ad11ac2018-12-05 00:57:21 +0800[diff] [blame]53CONFIG_DM_PCA953X=y
Tom Riniecbc80e2018-07-09 15:13:08 -0400[diff] [blame]54CONFIG_DM_I2C=y
Tom Rini929ea652019-01-07 17:46:19 -0500[diff] [blame]55CONFIG_SYS_I2C_MVTWSI=y
Dennis Gilmoref08364f2020-06-27 15:00:16 -0500[diff] [blame]56CONFIG_I2C_EEPROM=y
57CONFIG_SPL_I2C_EEPROM=y
Dennis Gilmoref08364f2020-06-27 15:00:16 -0500[diff] [blame]58CONFIG_SUPPORT_EMMC_BOOT=y
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]59CONFIG_MMC_SDHCI=y
60CONFIG_MMC_SDHCI_SDMA=y
61CONFIG_MMC_SDHCI_MV=y
Miquel Raynal803baa22019-10-03 19:50:08 +0200[diff] [blame]62CONFIG_MTD=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]63CONFIG_SF_DEFAULT_BUS=1
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]64CONFIG_SPI_FLASH_WINBOND=y
Dennis Gilmoref08364f2020-06-27 15:00:16 -0500[diff] [blame]65CONFIG_SPI_FLASH_MTD=y
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]66CONFIG_PHY_MARVELL=y
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]67CONFIG_PHY_GIGE=y
68CONFIG_MVNETA=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]69CONFIG_MII=y
Marek Behún99e296f2022-04-27 12:41:46 +0200[diff] [blame]70CONFIG_MVMDIO=y
Dennis Gilmoref08364f2020-06-27 15:00:16 -0500[diff] [blame]71CONFIG_PCI=y
72CONFIG_PCI_MVEBU=y
Tom Riniecbc80e2018-07-09 15:13:08 -0400[diff] [blame]73CONFIG_SCSI=y
Pali Rohár40954732022-05-09 20:17:07 +0200[diff] [blame]74CONFIG_SPL_DEBUG_UART_BASE=0xd0012000
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]75CONFIG_DEBUG_UART_SHIFT=2
76CONFIG_SYS_NS16550=y
77CONFIG_KIRKWOOD_SPI=y
78CONFIG_USB=y
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]79CONFIG_USB_XHCI_HCD=y