| Chunhe Lan | 8e4f3ff | 2014-04-14 18:42:06 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2014 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <asm/fsl_law.h> |
| 9 | #include <asm/mmu.h> |
| 10 | |
| 11 | struct law_entry law_table[] = { |
| 12 | SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC), |
| 13 | #ifdef CONFIG_SYS_BMAN_MEM_PHYS |
| 14 | SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_BMAN), |
| 15 | #endif |
| 16 | #ifdef CONFIG_SYS_QMAN_MEM_PHYS |
| 17 | SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN), |
| 18 | #endif |
| Chunhe Lan | c3eb88d | 2014-09-12 14:47:09 +0800 | [diff] [blame] | 19 | #ifdef CONFIG_SYS_CPLD_BASE_PHYS |
| 20 | SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC), |
| 21 | #endif |
| Chunhe Lan | 8e4f3ff | 2014-04-14 18:42:06 +0800 | [diff] [blame] | 22 | #ifdef CONFIG_SYS_DCSRBAR_PHYS |
| 23 | /* Limit DCSR to 32M to access NPC Trace Buffer */ |
| 24 | SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR), |
| 25 | #endif |
| 26 | #ifdef CONFIG_SYS_NAND_BASE_PHYS |
| 27 | SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC), |
| 28 | #endif |
| 29 | }; |
| 30 | |
| 31 | int num_law_entries = ARRAY_SIZE(law_table); |