Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / e79ea0e4a815a766525b6ee408ad418fdb81321d / . / configs / sama5d36ek_cmp_spiflash_defconfig
blob: eddeead2f2e520424a3083191c2cd41e576fcaff [file] [log] [blame]
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_AT91=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x26f00000
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]4CONFIG_TARGET_SAMA5D3XEK=y
5CONFIG_SYS_MALLOC_F_LEN=0x2000
Markus Klotzbuecher7bd60e62019-05-15 15:15:54 +0200[diff] [blame]6CONFIG_ENV_SIZE=0x2000
7CONFIG_ENV_OFFSET=0x6000
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]8CONFIG_NR_DRAM_BANKS=1
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]9CONFIG_DEBUG_UART_BOARD_INIT=y
10CONFIG_DEBUG_UART_BASE=0xffffee00
11CONFIG_DEBUG_UART_CLOCK=132000000
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]12CONFIG_DEBUG_UART=y
Adam Ford58dbf862018-02-06 07:58:59 -0600[diff] [blame]13CONFIG_ENV_VARS_UBOOT_CONFIG=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]14CONFIG_FIT=y
Wenyou Yange035ea72017-09-14 11:07:44 +0800[diff] [blame]15CONFIG_SPI_BOOT=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]16CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]17CONFIG_USE_BOOTARGS=y
Eugen Hristev68b37ab2018-04-24 12:00:16 +0300[diff] [blame]18CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]19# CONFIG_CONSOLE_MUX is not set
20CONFIG_SYS_CONSOLE_IS_IN_ENV=y
21# CONFIG_DISPLAY_BOARDINFO is not set
22CONFIG_HUSH_PARSER=y
23CONFIG_CMD_BOOTZ=y
24# CONFIG_CMD_IMI is not set
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]25# CONFIG_CMD_LOADS is not set
26CONFIG_CMD_MMC=y
Tom Rini00448d22017-07-28 21:31:42 -0400[diff] [blame]27CONFIG_CMD_NAND=y
28CONFIG_CMD_NAND_TRIMFFS=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]29CONFIG_CMD_SF=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]30CONFIG_CMD_DHCP=y
31CONFIG_CMD_MII=y
32CONFIG_CMD_PING=y
33CONFIG_CMD_FAT=y
34CONFIG_OF_CONTROL=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]35CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]36CONFIG_ENV_IS_IN_SPI_FLASH=y
Markus Klotzbuecher7bd60e62019-05-15 15:15:54 +0200[diff] [blame]37CONFIG_ENV_SECT_SIZE=0x1000
Alex Kiernana410d6e2018-04-01 16:37:53 +0000[diff] [blame]38CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]39CONFIG_DM=y
40CONFIG_CLK=y
41CONFIG_CLK_AT91=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]42CONFIG_AT91_H32MX=y
43CONFIG_DM_GPIO=y
44CONFIG_AT91_GPIO=y
45CONFIG_DM_MMC=y
46CONFIG_GENERIC_ATMEL_MCI=y
Adam Ford9c519182018-07-08 08:11:07 -0500[diff] [blame]47CONFIG_NAND=y
48CONFIG_NAND_ATMEL=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]49CONFIG_DM_SPI_FLASH=y
50CONFIG_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]51CONFIG_SF_DEFAULT_SPEED=30000000
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]52CONFIG_SPI_FLASH_ATMEL=y
53CONFIG_DM_ETH=y
54CONFIG_MACB=y
55CONFIG_PINCTRL=y
56CONFIG_PINCTRL_AT91=y
57CONFIG_DM_SERIAL=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]58CONFIG_DEBUG_UART_ATMEL=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]59CONFIG_DEBUG_UART_ANNOUNCE=y
60CONFIG_ATMEL_USART=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]61CONFIG_SPI=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]62CONFIG_DM_SPI=y
Wenyou.Yang@microchip.com272167d2017-08-15 17:40:27 +0800[diff] [blame]63CONFIG_TIMER=y
64CONFIG_ATMEL_PIT_TIMER=y
Wenyou Yang3c3be532017-09-18 15:25:58 +0800[diff] [blame]65CONFIG_DM_VIDEO=y
66CONFIG_ATMEL_HLCD=y
Tom Rinid8532af2017-06-02 11:03:50 -0400[diff] [blame]67CONFIG_FAT_WRITE=y