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stroese4536e9b2004-12-16 18:24:06 +00001/*
2 * (C) Copyright 2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <command.h>
26#include <malloc.h>
27#include <asm/m5249.h>
Matthias Fuchs5dde4e22009-02-20 10:19:19 +010028#include <asm/io.h>
stroese4536e9b2004-12-16 18:24:06 +000029
30
31/* Prototypes */
stroese4536e9b2004-12-16 18:24:06 +000032int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
33int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
34
35
36#if 0
37#define FPGA_DEBUG
38#endif
39
40/* predefine these here for FPGA programming (before including fpga.c) */
41#define SET_FPGA(data) mbar2_writeLong(MCFSIM_GPIO1_OUT, data)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020042#define FPGA_DONE_STATE (mbar2_readLong(MCFSIM_GPIO1_READ) & CONFIG_SYS_FPGA_DONE)
43#define FPGA_INIT_STATE (mbar2_readLong(MCFSIM_GPIO1_READ) & CONFIG_SYS_FPGA_INIT)
stroese4536e9b2004-12-16 18:24:06 +000044#define FPGA_PROG_ACTIVE_HIGH /* on this platform is PROG active high! */
45#define out32(a,b) /* nothing to do (gpio already configured) */
46
47
48/* fpga configuration data - generated by bin2cc */
49const unsigned char fpgadata[] =
50{
51#include "fpgadata.c"
52};
53
54/*
55 * include common fpga code (for esd boards)
56 */
57#include "../common/fpga.c"
58
59
60int checkboard (void) {
61 ulong val;
wdenk07d7e6b2004-12-16 21:44:03 +000062 uchar val8;
stroese4536e9b2004-12-16 18:24:06 +000063
64 puts ("Board: ");
65 puts("esd TASREG");
66 val8 = ((uchar)~((uchar)mbar2_readLong(MCFSIM_GPIO1_READ) >> 4)) & 0xf;
67 printf(" (Switch=%1X)\n", val8);
68
69 /*
70 * Set LED on
71 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020072 val = mbar2_readLong(MCFSIM_GPIO1_OUT) & ~CONFIG_SYS_GPIO1_LED;
stroese4536e9b2004-12-16 18:24:06 +000073 mbar2_writeLong(MCFSIM_GPIO1_OUT, val); /* Set LED on */
74
75 return 0;
76};
77
78
Becky Brucebd99ae72008-06-09 16:03:40 -050079phys_size_t initdram (int board_type) {
stroese4536e9b2004-12-16 18:24:06 +000080 unsigned long junk = 0xa5a59696;
81
82 /*
83 * Note:
84 * RC = ([(RefreshTime/#rows) / (1/BusClk)] / 16) - 1
85 */
86
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020087#ifdef CONFIG_SYS_FAST_CLK
stroese4536e9b2004-12-16 18:24:06 +000088 /*
89 * Busclk=70MHz, RefreshTime=64ms, #rows=4096 (4K)
90 * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=39
91 */
92 mbar_writeShort(MCFSIM_DCR, 0x8239);
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020093#elif CONFIG_SYS_PLL_BYPASS
stroese4536e9b2004-12-16 18:24:06 +000094 /*
95 * Busclk=5.6448MHz, RefreshTime=64ms, #rows=8192 (8K)
96 * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=02
97 */
98 mbar_writeShort(MCFSIM_DCR, 0x8202);
99#else
100 /*
101 * Busclk=36MHz, RefreshTime=64ms, #rows=4096 (4K)
102 * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=22 (562 bus clock cycles)
103 */
104 mbar_writeShort(MCFSIM_DCR, 0x8222);
105#endif
106
107 /*
108 * SDRAM starts at 0x0000_0000, CASL=10, CBM=010, PS=10 (16bit port),
109 * PM=1 (continuous page mode)
110 */
111
112 /* RE=0 (keep auto-refresh disabled while setting up registers) */
113 mbar_writeLong(MCFSIM_DACR0, 0x00003324);
114
115 /* BAM=007c (bits 22,21 are bank selects; 256kB blocks) */
116 mbar_writeLong(MCFSIM_DMR0, 0x01fc0001);
117
118 /** Precharge sequence **/
119 mbar_writeLong(MCFSIM_DACR0, 0x0000332c); /* Set DACR0[IP] (bit 3) */
Matthias Fuchs5dde4e22009-02-20 10:19:19 +0100120 out_be32((void *)0, junk); /* write to a memory location to init. precharge */
stroese4536e9b2004-12-16 18:24:06 +0000121 udelay(0x10); /* Allow several Precharge cycles */
122
123 /** Refresh Sequence **/
124 mbar_writeLong(MCFSIM_DACR0, 0x0000b324); /* Enable the refresh bit, DACR0[RE] (bit 15) */
125 udelay(0x7d0); /* Allow gobs of refresh cycles */
126
127 /** Mode Register initialization **/
128 mbar_writeLong(MCFSIM_DACR0, 0x0000b364); /* Enable DACR0[IMRS] (bit 6); RE remains enabled */
Matthias Fuchs5dde4e22009-02-20 10:19:19 +0100129 out_be32((void *)0x800, junk); /* Access RAM to initialize the mode register */
stroese4536e9b2004-12-16 18:24:06 +0000130
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200131 return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
stroese4536e9b2004-12-16 18:24:06 +0000132};
133
134
135int testdram (void) {
136 /* TODO: XXX XXX XXX */
137 printf ("DRAM test not implemented!\n");
138
139 return (0);
140}
141
142
143int misc_init_r (void)
144{
145 unsigned char *dst;
146 ulong len = sizeof(fpgadata);
147 int status;
148 int index;
149 int i;
150 uchar buf[8];
151
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200152 dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
153 if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
stroese4536e9b2004-12-16 18:24:06 +0000154 printf ("GUNZIP ERROR - must RESET board to recover\n");
155 do_reset (NULL, 0, 0, NULL);
156 }
157
158 status = fpga_boot(dst, len);
159 if (status != 0) {
160 printf("\nFPGA: Booting failed ");
161 switch (status) {
162 case ERROR_FPGA_PRG_INIT_LOW:
163 printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
164 break;
165 case ERROR_FPGA_PRG_INIT_HIGH:
166 printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
167 break;
168 case ERROR_FPGA_PRG_DONE:
169 printf("(Timeout: DONE not high after programming FPGA)\n ");
170 break;
171 }
172
173 /* display infos on fpgaimage */
174 index = 15;
175 for (i=0; i<4; i++) {
176 len = dst[index];
177 printf("FPGA: %s\n", &(dst[index+1]));
178 index += len+3;
179 }
180 putc ('\n');
181 /* delayed reboot */
182 for (i=20; i>0; i--) {
183 printf("Rebooting in %2d seconds \r",i);
184 for (index=0;index<1000;index++)
185 udelay(1000);
186 }
187 putc ('\n');
188 do_reset(NULL, 0, 0, NULL);
189 }
190
191 puts("FPGA: ");
192
193 /* display infos on fpgaimage */
194 index = 15;
195 for (i=0; i<4; i++) {
196 len = dst[index];
197 printf("%s ", &(dst[index+1]));
198 index += len+3;
199 }
200 putc ('\n');
201
202 free(dst);
203
204 /*
205 *
206 */
207 buf[0] = 0x00;
208 buf[1] = 0x32;
209 buf[2] = 0x3f;
210 i2c_write(0x38, 0, 0, buf, 3);
211
212 return (0);
213}
214
215
216#if 1 /* test-only: board specific test commands */
217int i2c_probe(uchar addr);
218
219/*
220 */
Wolfgang Denk6262d0212010-06-28 22:00:46 +0200221int do_iploop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
stroese4536e9b2004-12-16 18:24:06 +0000222{
223 ulong addr;
224
225 if (argc < 2) {
226 puts("ERROR!\n");
227 return -1;
228 }
229
230 addr = simple_strtol (argv[1], NULL, 16);
231
Peter Tyser469cde42009-04-18 22:34:03 -0500232 printf("i2c probe looping on addr 0x%lx (cntrl-c aborts)...\n", addr);
stroese4536e9b2004-12-16 18:24:06 +0000233
234 for (;;) {
235 i2c_probe(addr);
236
237 /* Abort if ctrl-c was pressed */
238 if (ctrlc()) {
239 puts("\nAbort\n");
240 return 0;
241 }
242
243 udelay(1000);
244 }
245
246 return 0;
247}
248U_BOOT_CMD(
249 iploop, 2, 1, do_iploop,
Peter Tyser469cde42009-04-18 22:34:03 -0500250 "i2c probe loop <addr>",
Wolfgang Denkc54781c2009-05-24 17:06:54 +0200251 ""
252);
stroese4536e9b2004-12-16 18:24:06 +0000253
254/*
255 */
Wolfgang Denk6262d0212010-06-28 22:00:46 +0200256int do_codec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
stroese4536e9b2004-12-16 18:24:06 +0000257{
258 uchar buf[8];
259
Matthias Fuchs5dde4e22009-02-20 10:19:19 +0100260 out_be16((void *)0xe0000000, 0x4000);
stroese4536e9b2004-12-16 18:24:06 +0000261
262 udelay(5000); /* wait for 5ms */
263
264 buf[0] = 0x10;
265 buf[1] = 0x07;
266 buf[2] = 0x03;
267 i2c_write(0x10, 0, 0, buf, 3);
268
269 buf[0] = 0x10;
270 buf[1] = 0x01;
271 buf[2] = 0x80;
272 i2c_write(0x10, 0, 0, buf, 3);
273
274 buf[0] = 0x10;
275 buf[1] = 0x02;
276 buf[2] = 0x03;
277 i2c_write(0x10, 0, 0, buf, 3);
278
279 buf[0] = 0x10;
280 buf[1] = 0x03;
281 buf[2] = 0x29;
282 i2c_write(0x10, 0, 0, buf, 3);
283
284 buf[0] = 0x10;
285 buf[1] = 0x04;
286 buf[2] = 0x00;
287 i2c_write(0x10, 0, 0, buf, 3);
288
289 buf[0] = 0x10;
290 buf[1] = 0x05;
291 buf[2] = 0x00;
292 i2c_write(0x10, 0, 0, buf, 3);
293
294 buf[0] = 0x10;
295 buf[1] = 0x07;
296 buf[2] = 0x02;
297 i2c_write(0x10, 0, 0, buf, 3);
298
299 return 0;
300}
301U_BOOT_CMD(
302 codec, 1, 1, do_codec,
Peter Tyserdfb72b82009-01-27 18:03:12 -0600303 "Enable codec",
Wolfgang Denkc54781c2009-05-24 17:06:54 +0200304 ""
305);
stroese4536e9b2004-12-16 18:24:06 +0000306
307/*
308 */
Wolfgang Denk6262d0212010-06-28 22:00:46 +0200309int do_saa(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
stroese4536e9b2004-12-16 18:24:06 +0000310{
311 ulong addr;
312 ulong instr;
313 ulong cntrl;
314 ulong data;
315 uchar buf[8];
316
317 if (argc < 5) {
318 puts("ERROR!\n");
319 return -1;
320 }
321
322 addr = simple_strtol (argv[1], NULL, 16);
323 instr = simple_strtol (argv[2], NULL, 16);
324 cntrl = simple_strtol (argv[3], NULL, 16);
325 data = simple_strtol (argv[4], NULL, 16);
326
327 buf[0] = (uchar)instr;
328 buf[1] = (uchar)cntrl;
329 buf[2] = (uchar)data;
330 i2c_write(addr, 0, 0, buf, 3);
331
332 return 0;
333}
334U_BOOT_CMD(
335 saa, 5, 1, do_saa,
Peter Tyserdfb72b82009-01-27 18:03:12 -0600336 "Write to SAA1064 <addr> <instr> <cntrl> <data>",
Wolfgang Denkc54781c2009-05-24 17:06:54 +0200337 ""
338);
stroese4536e9b2004-12-16 18:24:06 +0000339
340/*
341 */
Wolfgang Denk6262d0212010-06-28 22:00:46 +0200342int do_iwrite(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
stroese4536e9b2004-12-16 18:24:06 +0000343{
344 ulong addr;
345 ulong data0;
346 ulong data1;
347 ulong data2;
348 ulong data3;
349 uchar buf[8];
350 int cnt;
351
352 if (argc < 3) {
353 puts("ERROR!\n");
354 return -1;
355 }
356
357 addr = simple_strtol (argv[1], NULL, 16);
358 cnt = simple_strtol (argv[2], NULL, 16);
359 data0 = simple_strtol (argv[3], NULL, 16);
360 data1 = simple_strtol (argv[4], NULL, 16);
361 data2 = simple_strtol (argv[5], NULL, 16);
362 data3 = simple_strtol (argv[6], NULL, 16);
363
364 printf("Writing %d bytes to device %lx!\n", cnt, addr);
365 buf[0] = (uchar)data0;
366 buf[1] = (uchar)data1;
367 buf[2] = (uchar)data2;
368 buf[3] = (uchar)data3;
369 i2c_write(addr, 0, 0, buf, cnt);
370
371 return 0;
372}
373U_BOOT_CMD(
374 iwrite, 6, 1, do_iwrite,
Peter Tyserdfb72b82009-01-27 18:03:12 -0600375 "Write n bytes to I2C-device",
Wolfgang Denkc54781c2009-05-24 17:06:54 +0200376 "addr cnt data0 ... datan"
377);
stroese4536e9b2004-12-16 18:24:06 +0000378
379/*
380 */
Wolfgang Denk6262d0212010-06-28 22:00:46 +0200381int do_iread(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
stroese4536e9b2004-12-16 18:24:06 +0000382{
383 ulong addr;
384 ulong cnt;
385 uchar buf[32];
386 int i;
387
388 if (argc < 3) {
389 puts("ERROR!\n");
390 return -1;
391 }
392
393 addr = simple_strtol (argv[1], NULL, 16);
394 cnt = simple_strtol (argv[2], NULL, 16);
395
396 i2c_read(addr, 0, 0, buf, cnt);
397 printf("I2C Data:");
398 for (i=0; i<cnt; i++) {
399 printf(" %02X", buf[i]);
400 }
401 printf("\n");
402
403 return 0;
404}
405U_BOOT_CMD(
406 iread, 3, 1, do_iread,
Peter Tyserdfb72b82009-01-27 18:03:12 -0600407 "Read from I2C <addr> <cnt>",
Wolfgang Denkc54781c2009-05-24 17:06:54 +0200408 ""
409);
stroese4536e9b2004-12-16 18:24:06 +0000410
411/*
412 */
Wolfgang Denk6262d0212010-06-28 22:00:46 +0200413int do_ireadl(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
stroese4536e9b2004-12-16 18:24:06 +0000414{
415 ulong addr;
416 uchar buf[32];
417 int cnt;
418
419 if (argc < 2) {
420 puts("ERROR!\n");
421 return -1;
422 }
423
424 addr = simple_strtol (argv[1], NULL, 16);
425 cnt = 1;
426
427 printf("iread looping on addr 0x%lx (cntrl-c aborts)...\n", addr);
428
429 for (;;) {
430 i2c_read(addr, 0, 0, buf, cnt);
431
432 /* Abort if ctrl-c was pressed */
433 if (ctrlc()) {
434 puts("\nAbort\n");
435 return 0;
436 }
437
438 udelay(3000);
439 }
440
441 return 0;
442}
443U_BOOT_CMD(
444 ireadl, 2, 1, do_ireadl,
Peter Tyserdfb72b82009-01-27 18:03:12 -0600445 "Read-loop from I2C <addr>",
Wolfgang Denkc54781c2009-05-24 17:06:54 +0200446 ""
447);
stroese4536e9b2004-12-16 18:24:06 +0000448#endif