| York Sun | b3d7164 | 2016-09-26 08:09:26 -0700 | [diff] [blame] | 1 | config ARCH_LS1012A |
| York Sun | fcd0e74 | 2016-10-04 14:31:47 -0700 | [diff] [blame] | 2 | bool |
| York Sun | 4dd8c61 | 2016-10-04 14:31:48 -0700 | [diff] [blame] | 3 | select FSL_LSCH2 |
| York Sun | b3d7164 | 2016-09-26 08:09:26 -0700 | [diff] [blame] | 4 | select SYS_FSL_MMDC |
| York Sun | 149eb33 | 2016-09-26 08:09:27 -0700 | [diff] [blame] | 5 | select SYS_FSL_ERRATUM_A010315 |
| 6 | |
| 7 | config ARCH_LS1043A |
| York Sun | fcd0e74 | 2016-10-04 14:31:47 -0700 | [diff] [blame] | 8 | bool |
| York Sun | 4dd8c61 | 2016-10-04 14:31:48 -0700 | [diff] [blame] | 9 | select FSL_LSCH2 |
| York Sun | 149eb33 | 2016-09-26 08:09:27 -0700 | [diff] [blame] | 10 | select SYS_FSL_ERRATUM_A010315 |
| Hou Zhiqiang | c06b30a | 2016-09-29 12:42:44 +0800 | [diff] [blame] | 11 | select SYS_FSL_ERRATUM_A010539 |
| York Sun | b3d7164 | 2016-09-26 08:09:26 -0700 | [diff] [blame] | 12 | |
| York Sun | bad4984 | 2016-09-26 08:09:24 -0700 | [diff] [blame] | 13 | config ARCH_LS1046A |
| York Sun | fcd0e74 | 2016-10-04 14:31:47 -0700 | [diff] [blame] | 14 | bool |
| York Sun | 4dd8c61 | 2016-10-04 14:31:48 -0700 | [diff] [blame] | 15 | select FSL_LSCH2 |
| Hou Zhiqiang | c06b30a | 2016-09-29 12:42:44 +0800 | [diff] [blame] | 16 | select SYS_FSL_ERRATUM_A010539 |
| York Sun | b3d7164 | 2016-09-26 08:09:26 -0700 | [diff] [blame] | 17 | |
| York Sun | fcd0e74 | 2016-10-04 14:31:47 -0700 | [diff] [blame] | 18 | config ARCH_LS2080A |
| 19 | bool |
| York Sun | 4dd8c61 | 2016-10-04 14:31:48 -0700 | [diff] [blame] | 20 | select FSL_LSCH3 |
| 21 | |
| 22 | config FSL_LSCH2 |
| 23 | bool |
| 24 | |
| 25 | config FSL_LSCH3 |
| 26 | bool |
| 27 | |
| 28 | menu "Layerscape architecture" |
| 29 | depends on FSL_LSCH2 || FSL_LSCH3 |
| York Sun | fcd0e74 | 2016-10-04 14:31:47 -0700 | [diff] [blame] | 30 | |
| York Sun | b3d7164 | 2016-09-26 08:09:26 -0700 | [diff] [blame] | 31 | config SYS_FSL_MMDC |
| York Sun | fcd0e74 | 2016-10-04 14:31:47 -0700 | [diff] [blame] | 32 | bool |
| York Sun | 149eb33 | 2016-09-26 08:09:27 -0700 | [diff] [blame] | 33 | |
| 34 | config SYS_FSL_ERRATUM_A010315 |
| 35 | bool "Workaround for PCIe erratum A010315" |
| Hou Zhiqiang | c06b30a | 2016-09-29 12:42:44 +0800 | [diff] [blame] | 36 | |
| 37 | config SYS_FSL_ERRATUM_A010539 |
| 38 | bool "Workaround for PIN MUX erratum A010539" |
| York Sun | 4dd8c61 | 2016-10-04 14:31:48 -0700 | [diff] [blame] | 39 | |
| York Sun | f188d22 | 2016-10-04 14:45:01 -0700 | [diff] [blame] | 40 | config MAX_CPUS |
| 41 | int "Maximum number of CPUs permitted for Layerscape" |
| 42 | default 4 if ARCH_LS1043A |
| 43 | default 4 if ARCH_LS1046A |
| 44 | default 16 if ARCH_LS2080A |
| 45 | default 1 |
| 46 | help |
| 47 | Set this number to the maximum number of possible CPUs in the SoC. |
| 48 | SoCs may have multiple clusters with each cluster may have multiple |
| 49 | ports. If some ports are reserved but higher ports are used for |
| 50 | cores, count the reserved ports. This will allocate enough memory |
| 51 | in spin table to properly handle all cores. |
| 52 | |
| York Sun | e7310a3 | 2016-10-04 14:45:54 -0700 | [diff] [blame^] | 53 | config SYS_FSL_IFC_BANK_COUNT |
| 54 | int "Maximum banks of Integrated flash controller" |
| 55 | depends on ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A |
| 56 | default 4 if ARCH_LS1043A |
| 57 | default 4 if ARCH_LS1046A |
| 58 | default 8 if ARCH_LS2080A |
| 59 | |
| York Sun | 4dd8c61 | 2016-10-04 14:31:48 -0700 | [diff] [blame] | 60 | endmenu |