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Siva Durga Prasad Paladugu650fb402015-06-10 15:50:57 +05301if ARCH_ZYNQMP
2
Tien Fong Chee6fd0a712019-01-23 14:20:03 +08003config SPL_FS_FAT
Simon Glass6172e2e2016-09-12 23:18:38 -06004 default y
5
Simon Glassf2a89462016-09-12 23:18:41 -06006config SPL_LIBCOMMON_SUPPORT
7 default y
8
Simon Glassf6de2572016-09-12 23:18:42 -06009config SPL_LIBDISK_SUPPORT
10 default y
11
Simon Glassb16c92c2016-09-12 23:18:43 -060012config SPL_LIBGENERIC_SUPPORT
13 default y
14
Simon Glassb58bfe02021-08-08 12:20:09 -060015config SPL_MMC
Alexandru Gagniucd5a75992017-04-04 10:02:58 -070016 default y if MMC_SDHCI_ZYNQ
Simon Glassbd58f1d2016-09-12 23:18:44 -060017
Simon Glassf4d60392021-08-08 12:20:12 -060018config SPL_SERIAL
Simon Glasse076d6f2016-09-12 23:18:56 -060019 default y
20
Simon Glass219d6122016-09-12 23:18:57 -060021config SPL_SPI_FLASH_SUPPORT
22 default y if ZYNQ_QSPI
23
Simon Glassa5820472021-08-08 12:20:14 -060024config SPL_SPI
Simon Glassb24fdca2016-09-12 23:18:58 -060025 default y if ZYNQ_QSPI
26
Michal Simek04b7e622015-01-15 10:01:51 +010027config SYS_BOARD
Liam Beguindda9e212021-10-20 11:25:18 -040028 string "Board name"
Michal Simek04b7e622015-01-15 10:01:51 +010029 default "zynqmp"
30
31config SYS_VENDOR
Mike Looijmans61d245c2017-01-03 09:47:52 +010032 string "Vendor name"
Michal Simek04b7e622015-01-15 10:01:51 +010033 default "xilinx"
34
35config SYS_SOC
36 default "zynqmp"
37
Siva Durga Prasad Paladugu4628c502017-07-13 19:01:11 +053038config SYS_MEM_RSVD_FOR_MMU
39 bool "Reserve memory for MMU Table"
40 help
41 If defined this option is used to setup different space for
42 MMU table than the one which will be allocated during
43 relocation.
44
Mike Looijmans96e706f2016-09-20 11:37:24 +020045config BOOT_INIT_FILE
46 string "boot.bin init register filename"
Michal Simek5d359092016-12-16 13:00:26 +010047 depends on SPL
Mike Looijmans96e706f2016-09-20 11:37:24 +020048 default ""
49 help
50 Add register writes to boot.bin format (max 256 pairs).
51 Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
52
Michal Simekdde5a882016-10-21 12:58:17 +020053config PMUFW_INIT_FILE
54 string "PMU firmware"
55 depends on SPL
56 default ""
57 help
58 Include external PMUFW (Platform Management Unit FirmWare) to
59 a Xilinx bootable image (boot.bin).
60
Luca Ceresoli23e65002019-05-21 18:06:43 +020061config ZYNQMP_SPL_PM_CFG_OBJ_FILE
62 string "PMU firmware configuration object to load at runtime by SPL"
63 depends on SPL
64 help
65 Path to a binary PMU firmware configuration object to be linked
66 into U-Boot SPL and loaded at runtime into the PMU firmware.
67
68 The ZynqMP Power Management Unit (PMU) needs a configuration
69 object for most SoC peripherals to work. To have it loaded by
70 U-Boot SPL set here the file name (absolute path or relative to
71 the top source tree) of your configuration, which must be a
72 binary blob. It will be linked in the SPL binary and loaded
73 into the PMU firmware by U-Boot SPL during board
74 initialization.
75
76 Leave this option empty if your PMU firmware has a hard-coded
77 configuration object or you are loading it by any other means.
78
Siva Durga Prasad Paladugucafb6312018-01-12 15:35:46 +053079config ZYNQMP_NO_DDR
80 bool "Disable DDR MMU mapping"
81 help
82 This option configures MMU with no DDR to avoid speculative
83 access to DDR memory where DDR is not present.
84
Jorge Ramirez-Ortiz35456962021-06-13 20:55:53 +020085config SPL_ZYNQMP_DRAM_ECC_INIT
86 bool "Initialize DRAM ECC"
87 depends on SPL
88 help
89 This option initializes all memory to 0xdeadbeef. Must be set if your
90 memory is of ECC type.
91
92config SPL_ZYNQMP_DRAM_BANK1_BASE
93 depends on SPL_ZYNQMP_DRAM_ECC_INIT
94 hex "DRAM Bank1 address"
Michal Simek70597f82023-10-26 08:34:31 +020095 default 0x00000000
96 help
97 Start address of DRAM ECC bank1
Jorge Ramirez-Ortiz35456962021-06-13 20:55:53 +020098
99config SPL_ZYNQMP_DRAM_BANK1_LEN
100 depends on SPL_ZYNQMP_DRAM_ECC_INIT
101 hex "DRAM Bank1 size"
Michal Simek70597f82023-10-26 08:34:31 +0200102 default 0x80000000
103 help
104 Size in bytes of the DRAM ECC bank1
Jorge Ramirez-Ortiz35456962021-06-13 20:55:53 +0200105
106config SPL_ZYNQMP_DRAM_BANK2_BASE
107 depends on SPL_ZYNQMP_DRAM_ECC_INIT
108 hex "DRAM Bank2 address"
Michal Simek70597f82023-10-26 08:34:31 +0200109 default 0x800000000
110 help
111 Start address of DRAM ECC bank2
Jorge Ramirez-Ortiz35456962021-06-13 20:55:53 +0200112
113config SPL_ZYNQMP_DRAM_BANK2_LEN
114 depends on SPL_ZYNQMP_DRAM_ECC_INIT
115 hex "DRAM Bank2 size"
Michal Simek70597f82023-10-26 08:34:31 +0200116 default 0x0
117 help
118 Size in bytes of the DRAM ECC bank2. A null size takes no action.
Jorge Ramirez-Ortiz35456962021-06-13 20:55:53 +0200119
Simon Glasscb3e4892016-07-05 17:10:13 -0600120config SYS_MALLOC_F_LEN
121 default 0x600
122
Siva Durga Prasad Paladugu9ed4e812017-07-13 19:01:10 +0530123config DEFINE_TCM_OCM_MMAP
124 bool "Define TCM and OCM memory in MMU Table"
Siva Durga Prasad Paladuguc3dfac92017-08-01 16:24:50 +0530125 default y if MP
Siva Durga Prasad Paladugu9ed4e812017-07-13 19:01:10 +0530126 help
127 This option if enabled defines the TCM and OCM memory and its
128 memory attributes in MMU table entry.
129
Michal Simekd8218792017-07-12 13:21:27 +0200130config ZYNQMP_PSU_INIT_ENABLED
131 bool "Include psu_init"
Michal Simekba6fb832022-02-17 14:28:40 +0100132 select BOARD_EARLY_INIT_F
Michal Simekd8218792017-07-12 13:21:27 +0200133 help
Michal Simek461b9312022-12-02 09:18:06 +0100134 Include psu_init to full u-boot.
135
136config SPL_ZYNQMP_PSU_INIT_ENABLED
137 bool "Include psu_init in SPL"
138 default y if SPL
139 select BOARD_EARLY_INIT_F
140 help
141 Include psu_init by default in SPL.
Michal Simekd8218792017-07-12 13:21:27 +0200142
Michal Simek94ddcaa2016-08-30 16:17:27 +0200143config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
144 bool "Overwrite SPL bootmode"
145 depends on SPL
146 help
147 Overwrite bootmode selected via boot mode pins to tell SPL what should
148 be the next boot device.
149
Jorge Ramirez-Ortiz34deca52021-10-13 15:48:00 +0200150config SPL_ZYNQMP_RESTORE_JTAG
151 bool "Restore JTAG"
152 depends on SPL
153 help
154 Booting SPL in secure mode causes the CSU to disable the JTAG interface
155 even if no eFuses were burnt. This option restores the interface if
156 possible.
157
Vipul Kumar62548002018-02-28 15:53:28 +0530158config ZYNQ_SDHCI_MAX_FREQ
159 default 200000000
160
Michal Simek94ddcaa2016-08-30 16:17:27 +0200161config SPL_ZYNQMP_ALT_BOOTMODE
162 hex
163 default 0x0 if JTAG_MODE
164 default 0x1 if QSPI_MODE_24BIT
165 default 0x2 if QSPI_MODE_32BIT
166 default 0x3 if SD_MODE
167 default 0x4 if NAND_MODE
168 default 0x5 if SD_MODE1
169 default 0x6 if EMMC_MODE
170 default 0x7 if USB_MODE
Michal Simek2740d372016-10-26 09:24:32 +0200171 default 0xa if SW_USBHOST_MODE
172 default 0xb if SW_SATA_MODE
Michal Simeke1c4d392017-02-15 09:41:53 +0100173 default 0xe if SD1_LSHFT_MODE
Michal Simek94ddcaa2016-08-30 16:17:27 +0200174
175choice
176 prompt "Boot mode"
Michal Simek8ffddc32016-08-30 16:17:27 +0200177 depends on SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
Ulf Magnusson3e3b16a2018-01-30 14:02:01 +0100178 default JTAG_MODE
Michal Simek94ddcaa2016-08-30 16:17:27 +0200179
180config JTAG_MODE
181 bool "JTAG_MODE"
182
183config QSPI_MODE_24BIT
184 bool "QSPI_MODE_24BIT"
185
186config QSPI_MODE_32BIT
187 bool "QSPI_MODE_32BIT"
188
189config SD_MODE
190 bool "SD_MODE"
191
192config SD_MODE1
193 bool "SD_MODE1"
194
195config NAND_MODE
196 bool "NAND_MODE"
197
198config EMMC_MODE
199 bool "EMMC_MODE"
200
201config USB_MODE
202 bool "USB"
203
Michal Simek2740d372016-10-26 09:24:32 +0200204config SW_USBHOST_MODE
205 bool "SW USBHOST_MODE"
206
207config SW_SATA_MODE
208 bool "SW SATA_MODE"
209
Michal Simeke1c4d392017-02-15 09:41:53 +0100210config SD1_LSHFT_MODE
211 bool "SD1_LSHFT_MODE"
212
Michal Simek94ddcaa2016-08-30 16:17:27 +0200213endchoice
Simon Glasscb3e4892016-07-05 17:10:13 -0600214
Michal Simek5f884852020-08-27 15:34:11 +0200215source "board/xilinx/Kconfig"
216source "board/xilinx/zynqmp/Kconfig"
217
Michal Simek04b7e622015-01-15 10:01:51 +0100218endif