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git01.mediatek.com / filogic / uboot / e6b57eb31fe0583080eafbfe76eacccd7fa3efbe / . / arch / arm / dts / am335x-brppt1-mmc.dts
blob: 4db279b65e5cd888f7d1b40346d021a2770fc1c8 [file] [log] [blame]
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +0200[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2018 B&R Industrial Automation GmbH
4 * http://www.br-automation.com
5 *
6 */
7/dts-v1/;
8
9#include "am33xx.dtsi"
10
11/ {
12 model = "BRPPT1 (MMC) Panel";
13 compatible = "ti,am33xx";
14
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +0200[diff] [blame]15
16 aliases {
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +0200[diff] [blame]17 gpmc = &gpmc;
18 mmc = &mmc2;
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +0200[diff] [blame]19 };
20
21 chosen {
22 bootargs = "console=ttyO0,115200 earlyprintk";
23 stdout-path = &uart0;
24 };
25
26 memory {
27 device_type = "memory";
28 reg = <0x80000000 0x10000000>; /* 256 MB */
29 };
30
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +0200[diff] [blame]31 vmmcsd_fixed: fixedregulator@0 {
32 compatible = "regulator-fixed";
33 regulator-name = "vmmcsd_fixed";
34 regulator-min-microvolt = <3300000>;
35 regulator-max-microvolt = <3300000>;
36 };
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +0200[diff] [blame]37};
38
39&uart0 { /* console uart */
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +0200[diff] [blame]40 status = "okay";
41};
42
43&i2c0 {
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +0200[diff] [blame]44 status = "okay";
45 clock-frequency = <400000>;
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +0200[diff] [blame]46};
47
48&i2c2 {
49 status = "okay";
50 clock-frequency = <100000>;
51};
52
53&edma {
54 status = "okay";
55};
56
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +0200[diff] [blame]57&usb {
58 status = "okay";
59};
60
61&usb_ctrl_mod {
62 status = "okay";
63};
64
65&usb0_phy {
66 status = "okay";
67};
68
69&usb1_phy {
70 status = "okay";
71};
72
73&usb0 {
74 status = "okay";
75 dr_mode = "host";
76};
77
78&usb1 {
79 status = "okay";
80 dr_mode = "host";
81};
82
83&davinci_mdio {
84 status = "okay";
85
86 phy0: ethernet-phy@0 {
87 reg = <1>;
88 };
89
90 phy1: ethernet-phy@1 {
91 reg = <2>;
92 };
93};
94
95&mac {
96 status = "okay";
97};
98
99&cpsw_emac0 {
100 phy-handle = <&phy0>;
101 dual_emac_res_vlan = <1>;
102 phy-mode = "mii";
103};
104
105&cpsw_emac1 {
106 phy-handle = <&phy1>;
107 dual_emac_res_vlan = <2>;
108 phy-mode = "mii";
109};
110
111&mmc1 {
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +0200[diff] [blame]112 vmmc-supply = <&vmmcsd_fixed>;
113 bus-width = <0x4>;
114 ti,non-removable;
115 ti,needs-special-hs-handling;
116 ti,vcc-aux-disable-is-sleep;
117 status = "okay";
118};
119
120&mmc2 {
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +0200[diff] [blame]121 vmmc-supply = <&vmmcsd_fixed>;
122 bus-width = <0x8>;
123 ti,non-removable;
124 ti,needs-special-hs-handling;
125 ti,vcc-aux-disable-is-sleep;
126 status = "okay";
127};
128
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +0200[diff] [blame]129&gpio0 {
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +0200[diff] [blame]130 ti,no-reset-on-init;
131};
132
133&gpio1 {
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +0200[diff] [blame]134 ti,no-reset-on-init;
135};
136
137&gpio2 {
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +0200[diff] [blame]138 ti,no-reset-on-init;
139};
140
141&gpio3 {
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +0200[diff] [blame]142 ti,no-reset-on-init;
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +0200[diff] [blame]143};
144
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +0200[diff] [blame]145&timer6 { /* used for cpsw end device */
146 status = "okay";
147 ti,no-reset-on-init;
148 ti,no-idle-on-init;
149};
150
151&timer7 { /* used for cpsw end device */
152 status = "okay";
153 ti,no-reset-on-init;
154 ti,no-idle-on-init;
155};