Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2008 Miromico AG |
| 3 | * |
| 4 | * Configuration settings for the Miromico Hammerhead AVR32 board |
| 5 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 6 | * SPDX-License-Identifier: GPL-2.0+ |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 7 | */ |
| 8 | #ifndef __CONFIG_H |
| 9 | #define __CONFIG_H |
| 10 | |
Andreas Bießmann | a7a0b03 | 2011-04-18 04:12:41 +0000 | [diff] [blame] | 11 | #define CONFIG_AVR32 |
| 12 | #define CONFIG_AT32AP |
| 13 | #define CONFIG_AT32AP7000 |
| 14 | #define CONFIG_HAMMERHEAD |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 15 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 16 | #define CONFIG_SYS_HZ 1000 |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 17 | |
| 18 | /* |
| 19 | * Set up the PLL to run at 125 MHz, the CPU to run at the PLL |
| 20 | * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency |
| 21 | * and the PBA bus to run at 1/4 the PLL frequency. |
| 22 | */ |
Andreas Bießmann | a7a0b03 | 2011-04-18 04:12:41 +0000 | [diff] [blame] | 23 | #define CONFIG_PLL |
| 24 | #define CONFIG_SYS_POWER_MANAGER |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 25 | #define CONFIG_SYS_OSC0_HZ 25000000 |
| 26 | #define CONFIG_SYS_PLL0_DIV 1 |
| 27 | #define CONFIG_SYS_PLL0_MUL 5 |
| 28 | #define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16 |
| 29 | #define CONFIG_SYS_CLKDIV_CPU 0 |
| 30 | #define CONFIG_SYS_CLKDIV_HSB 1 |
| 31 | #define CONFIG_SYS_CLKDIV_PBA 2 |
| 32 | #define CONFIG_SYS_CLKDIV_PBB 1 |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 33 | |
Haavard Skinnemoen | c6f292f | 2010-08-12 13:52:54 +0700 | [diff] [blame] | 34 | /* Reserve VM regions for SDRAM and NOR flash */ |
| 35 | #define CONFIG_SYS_NR_VM_REGIONS 2 |
| 36 | |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 37 | /* |
| 38 | * The PLLOPT register controls the PLL like this: |
| 39 | * icp = PLLOPT<2> |
| 40 | * ivco = PLLOPT<1:0> |
| 41 | * |
| 42 | * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). |
| 43 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 44 | #define CONFIG_SYS_PLL0_OPT 0x04 |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 45 | |
Andreas Bießmann | 5807e79 | 2010-11-04 23:15:31 +0000 | [diff] [blame] | 46 | #define CONFIG_USART_BASE ATMEL_BASE_USART1 |
| 47 | #define CONFIG_USART_ID 1 |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 48 | |
| 49 | #define CONFIG_HOSTNAME hammerhead |
| 50 | |
| 51 | /* User serviceable stuff */ |
Andreas Bießmann | a7a0b03 | 2011-04-18 04:12:41 +0000 | [diff] [blame] | 52 | #define CONFIG_DOS_PARTITION |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 53 | |
Andreas Bießmann | a7a0b03 | 2011-04-18 04:12:41 +0000 | [diff] [blame] | 54 | #define CONFIG_CMDLINE_TAG |
| 55 | #define CONFIG_SETUP_MEMORY_TAGS |
| 56 | #define CONFIG_INITRD_TAG |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 57 | |
| 58 | #define CONFIG_STACKSIZE (2048) |
| 59 | |
| 60 | #define CONFIG_BAUDRATE 115200 |
| 61 | #define CONFIG_BOOTARGS \ |
| 62 | "console=ttyS0 root=mtd1 rootfstype=jffs2" |
| 63 | #define CONFIG_BOOTCOMMAND \ |
| 64 | "fsload; bootm" |
| 65 | |
| 66 | /* |
| 67 | * Only interrupt autoboot if <space> is pressed. Otherwise, garbage |
| 68 | * data on the serial line may interrupt the boot sequence. |
| 69 | */ |
| 70 | #define CONFIG_BOOTDELAY 1 |
Andreas Bießmann | a7a0b03 | 2011-04-18 04:12:41 +0000 | [diff] [blame] | 71 | #define CONFIG_AUTOBOOT |
| 72 | #define CONFIG_AUTOBOOT_KEYED |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 73 | #define CONFIG_AUTOBOOT_PROMPT \ |
Haavard Skinnemoen | abdb55a | 2008-08-20 09:28:36 +0200 | [diff] [blame] | 74 | "Press SPACE to abort autoboot in %d seconds\n", bootdelay |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 75 | #define CONFIG_AUTOBOOT_DELAY_STR "d" |
| 76 | #define CONFIG_AUTOBOOT_STOP_STR " " |
| 77 | |
| 78 | /* |
| 79 | * After booting the board for the first time, new ethernet address |
| 80 | * should be generated and assigned to the environment variables |
| 81 | * "ethaddr". This is normally done during production. |
| 82 | */ |
Andreas Bießmann | a7a0b03 | 2011-04-18 04:12:41 +0000 | [diff] [blame] | 83 | #define CONFIG_OVERWRITE_ETHADDR_ONCE |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 84 | |
| 85 | /* |
| 86 | * BOOTP/DHCP options |
| 87 | */ |
| 88 | #define CONFIG_BOOTP_SUBNETMASK |
| 89 | #define CONFIG_BOOTP_GATEWAY |
| 90 | |
| 91 | /* |
| 92 | * Command line configuration. |
| 93 | */ |
| 94 | #include <config_cmd_default.h> |
| 95 | |
| 96 | #define CONFIG_CMD_ASKENV |
| 97 | #define CONFIG_CMD_DHCP |
| 98 | #define CONFIG_CMD_EXT2 |
| 99 | #define CONFIG_CMD_FAT |
| 100 | #define CONFIG_CMD_JFFS2 |
| 101 | #define CONFIG_CMD_MMC |
| 102 | #undef CONFIG_CMD_FPGA |
| 103 | #undef CONFIG_CMD_SETGETDCR |
| 104 | |
Andreas Bießmann | a7a0b03 | 2011-04-18 04:12:41 +0000 | [diff] [blame] | 105 | #define CONFIG_ATMEL_USART |
| 106 | #define CONFIG_MACB |
| 107 | #define CONFIG_PORTMUX_PIO |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 108 | #define CONFIG_SYS_NR_PIOS 5 |
Andreas Bießmann | a7a0b03 | 2011-04-18 04:12:41 +0000 | [diff] [blame] | 109 | #define CONFIG_SYS_HSDRAMC |
| 110 | #define CONFIG_MMC |
Sven Schnelle | 8aa9682 | 2011-10-21 14:49:25 +0200 | [diff] [blame] | 111 | #define CONFIG_GENERIC_ATMEL_MCI |
| 112 | #define CONFIG_GENERIC_MMC |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 113 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 114 | #define CONFIG_SYS_DCACHE_LINESZ 32 |
| 115 | #define CONFIG_SYS_ICACHE_LINESZ 32 |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 116 | |
| 117 | #define CONFIG_NR_DRAM_BANKS 1 |
| 118 | |
Andreas Bießmann | a7a0b03 | 2011-04-18 04:12:41 +0000 | [diff] [blame] | 119 | #define CONFIG_SYS_FLASH_CFI |
| 120 | #define CONFIG_FLASH_CFI_DRIVER |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 121 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 122 | #define CONFIG_SYS_FLASH_BASE 0x00000000 |
| 123 | #define CONFIG_SYS_FLASH_SIZE 0x800000 |
| 124 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 125 | #define CONFIG_SYS_MAX_FLASH_SECT 135 |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 126 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 127 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
Andreas Bießmann | 1484441 | 2011-04-18 04:12:47 +0000 | [diff] [blame] | 128 | #define CONFIG_SYS_TEXT_BASE 0x00000000 |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 129 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 130 | #define CONFIG_SYS_INTRAM_BASE 0x24000000 |
| 131 | #define CONFIG_SYS_INTRAM_SIZE 0x8000 |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 132 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 133 | #define CONFIG_SYS_SDRAM_BASE 0x10000000 |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 134 | |
Andreas Bießmann | a7a0b03 | 2011-04-18 04:12:41 +0000 | [diff] [blame] | 135 | #define CONFIG_ENV_IS_IN_FLASH |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 136 | #define CONFIG_ENV_SIZE 65536 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 137 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE) |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 138 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 139 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 140 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 141 | #define CONFIG_SYS_MALLOC_LEN (256*1024) |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 142 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 143 | #define CONFIG_SYS_DMA_ALLOC_LEN (16384) |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 144 | |
| 145 | /* Allow 4MB for the kernel run-time image */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 146 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00400000) |
| 147 | #define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024) |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 148 | |
| 149 | /* Other configuration settings that shouldn't have to change all that often */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 150 | #define CONFIG_SYS_PROMPT "Hammerhead> " |
| 151 | #define CONFIG_SYS_CBSIZE 256 |
| 152 | #define CONFIG_SYS_MAXARGS 16 |
| 153 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
Andreas Bießmann | a7a0b03 | 2011-04-18 04:12:41 +0000 | [diff] [blame] | 154 | #define CONFIG_SYS_LONGHELP |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 155 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 156 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| 157 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000) |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 158 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 159 | #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 160 | |
| 161 | #endif /* __CONFIG_H */ |