| Peng Fan | a181afe | 2019-09-16 03:09:55 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2019 NXP |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | * |
| 6 | * Generated code from MX8M_DDR_tool |
| 7 | * Align with uboot-imx_v2018.03_4.14.78_1.0.0_ga |
| 8 | */ |
| 9 | |
| 10 | #include <linux/kernel.h> |
| 11 | #include <asm/arch/ddr.h> |
| 12 | |
| 13 | struct dram_cfg_param ddr_ddrc_cfg[] = { |
| 14 | {0x3d400000, 0x81040010}, |
| 15 | {0x3d400030, 0x00000020}, |
| 16 | {0x3d400034, 0x00221306}, |
| 17 | {0x3d400050, 0x00210070}, |
| 18 | {0x3d400054, 0x00010008}, |
| 19 | {0x3d400060, 0x00000000}, |
| 20 | {0x3d400064, 0x0092014a}, |
| 21 | {0x3d4000c0, 0x00000000}, |
| 22 | {0x3d4000c4, 0x00001000}, |
| 23 | {0x3d4000d0, 0xc0030126}, |
| 24 | {0x3d4000d4, 0x00770000}, |
| 25 | {0x3d4000dc, 0x08340105}, |
| 26 | {0x3d4000e0, 0x00180200}, |
| 27 | {0x3d4000e4, 0x00110000}, |
| 28 | {0x3d4000e8, 0x02000740}, |
| 29 | {0x3d4000ec, 0x00000850}, |
| 30 | {0x3d4000f4, 0x00000ec7}, |
| 31 | {0x3d400100, 0x11122914}, |
| 32 | {0x3d400104, 0x0004051c}, |
| 33 | {0x3d400108, 0x0608050d}, |
| 34 | {0x3d40010c, 0x0000400c}, |
| 35 | {0x3d400110, 0x08030409}, |
| 36 | {0x3d400114, 0x06060403}, |
| 37 | {0x3d40011c, 0x00000606}, |
| 38 | {0x3d400120, 0x07070d0c}, |
| 39 | {0x3d400124, 0x0002040a}, |
| 40 | {0x3d40012c, 0x1809010e}, |
| 41 | {0x3d400130, 0x00000008}, |
| 42 | {0x3d40013c, 0x00000000}, |
| 43 | {0x3d400180, 0x01000040}, |
| 44 | {0x3d400184, 0x0000493e}, |
| 45 | {0x3d400190, 0x038b8207}, |
| 46 | {0x3d400194, 0x02020303}, |
| 47 | {0x3d400198, 0x07f04011}, |
| 48 | {0x3d40019c, 0x000000b0}, |
| 49 | {0x3d4001a0, 0xe0400018}, |
| 50 | {0x3d4001a4, 0x0048005a}, |
| 51 | {0x3d4001a8, 0x80000000}, |
| 52 | {0x3d4001b0, 0x00000001}, |
| 53 | {0x3d4001b4, 0x00000b07}, |
| 54 | {0x3d4001b8, 0x00000004}, |
| 55 | {0x3d4001c0, 0x00000001}, |
| 56 | {0x3d4001c4, 0x00000000}, |
| 57 | {0x3d400240, 0x06000610}, |
| 58 | {0x3d400244, 0x00001323}, |
| 59 | {0x3d400200, 0x00003f1f}, |
| 60 | {0x3d400204, 0x003f0909}, |
| 61 | {0x3d400208, 0x01010100}, |
| 62 | {0x3d40020c, 0x01010101}, |
| 63 | {0x3d400210, 0x00001f1f}, |
| 64 | {0x3d400214, 0x07070707}, |
| 65 | {0x3d400218, 0x07070707}, |
| 66 | {0x3d40021c, 0x00000f07}, |
| 67 | {0x3d400220, 0x00003f01}, |
| 68 | {0x3d402050, 0x00210070}, |
| 69 | {0x3d402064, 0x00180037}, |
| 70 | {0x3d4020dc, 0x00000105}, |
| 71 | {0x3d4020e0, 0x00000000}, |
| 72 | {0x3d4020e8, 0x02000740}, |
| 73 | {0x3d4020ec, 0x00000050}, |
| 74 | {0x3d402100, 0x08030604}, |
| 75 | {0x3d402104, 0x00020205}, |
| 76 | {0x3d402108, 0x05050309}, |
| 77 | {0x3d40210c, 0x0000400c}, |
| 78 | {0x3d402110, 0x02030202}, |
| 79 | {0x3d402114, 0x03030202}, |
| 80 | {0x3d402118, 0x0a070008}, |
| 81 | {0x3d40211c, 0x00000d09}, |
| 82 | {0x3d402120, 0x08084b09}, |
| 83 | {0x3d402124, 0x00020308}, |
| 84 | {0x3d402128, 0x000f0d06}, |
| 85 | {0x3d40212c, 0x12060111}, |
| 86 | {0x3d402130, 0x00000008}, |
| 87 | {0x3d40213c, 0x00000000}, |
| 88 | {0x3d402180, 0x01000040}, |
| 89 | {0x3d402190, 0x03848204}, |
| 90 | {0x3d402194, 0x02020303}, |
| 91 | {0x3d4021b4, 0x00000404}, |
| 92 | {0x3d4021b8, 0x00000004}, |
| 93 | {0x3d402240, 0x07000600}, |
| 94 | {0x3d403050, 0x00210070}, |
| 95 | {0x3d403064, 0x0006000d}, |
| 96 | {0x3d4030dc, 0x00000105}, |
| 97 | {0x3d4030e0, 0x00000000}, |
| 98 | {0x3d4030e8, 0x02000740}, |
| 99 | {0x3d4030ec, 0x00000050}, |
| 100 | {0x3d403100, 0x07010101}, |
| 101 | {0x3d403104, 0x00020202}, |
| 102 | {0x3d403108, 0x05050309}, |
| 103 | {0x3d40310c, 0x0000400c}, |
| 104 | {0x3d403110, 0x01030201}, |
| 105 | {0x3d403114, 0x03030202}, |
| 106 | {0x3d40311c, 0x00000303}, |
| 107 | {0x3d403120, 0x02020d02}, |
| 108 | {0x3d403124, 0x00020208}, |
| 109 | {0x3d403128, 0x000f0d06}, |
| 110 | {0x3d40312c, 0x0e02010e}, |
| 111 | {0x3d403130, 0x00000008}, |
| 112 | {0x3d40313c, 0x00000000}, |
| 113 | {0x3d403180, 0x01000040}, |
| 114 | {0x3d403190, 0x03848204}, |
| 115 | {0x3d403194, 0x02020303}, |
| 116 | {0x3d4031b4, 0x00000404}, |
| 117 | {0x3d4031b8, 0x00000004}, |
| 118 | {0x3d403240, 0x07000600}, |
| 119 | |
| 120 | /* performance setting */ |
| 121 | { 0x3d400250, 0x00001f05 }, |
| 122 | { 0x3d400254, 0x1f }, |
| 123 | { 0x3d400264, 0x900003ff }, |
| 124 | { 0x3d40026c, 0x200003ff }, |
| 125 | { 0x3d400494, 0x01000e00 }, |
| 126 | { 0x3d400498, 0x03ff0000 }, |
| 127 | { 0x3d40049c, 0x01000e00 }, |
| 128 | { 0x3d4004a0, 0x03ff0000 }, |
| 129 | }; |
| 130 | |
| 131 | /* PHY Initialize Configuration */ |
| 132 | struct dram_cfg_param ddr_ddrphy_cfg[] = { |
| 133 | {0x0001005f, 0x000002fd}, |
| 134 | {0x0001015f, 0x000002fd}, |
| 135 | {0x0001105f, 0x000002fd}, |
| 136 | {0x0001115f, 0x000002fd}, |
| 137 | {0x0011005f, 0x000002fd}, |
| 138 | {0x0011015f, 0x000002fd}, |
| 139 | {0x0011105f, 0x000002fd}, |
| 140 | {0x0011115f, 0x000002fd}, |
| 141 | {0x0021005f, 0x000002fd}, |
| 142 | {0x0021015f, 0x000002fd}, |
| 143 | {0x0021105f, 0x000002fd}, |
| 144 | {0x0021115f, 0x000002fd}, |
| 145 | {0x00000055, 0x00000355}, |
| 146 | {0x00001055, 0x00000355}, |
| 147 | {0x00002055, 0x00000355}, |
| 148 | {0x00003055, 0x00000355}, |
| 149 | {0x00004055, 0x00000055}, |
| 150 | {0x00005055, 0x00000055}, |
| 151 | {0x00006055, 0x00000355}, |
| 152 | {0x00007055, 0x00000355}, |
| 153 | {0x00008055, 0x00000355}, |
| 154 | {0x00009055, 0x00000355}, |
| 155 | {0x000200c5, 0x0000000a}, |
| 156 | {0x001200c5, 0x00000007}, |
| 157 | {0x002200c5, 0x00000007}, |
| 158 | {0x0002002e, 0x00000002}, |
| 159 | {0x0012002e, 0x00000002}, |
| 160 | {0x0022002e, 0x00000002}, |
| 161 | {0x00020024, 0x00000008}, |
| 162 | {0x0002003a, 0x00000002}, |
| 163 | {0x0002007d, 0x00000212}, |
| 164 | {0x0002007c, 0x00000061}, |
| 165 | {0x00120024, 0x00000008}, |
| 166 | {0x0002003a, 0x00000002}, |
| 167 | {0x0012007d, 0x00000212}, |
| 168 | {0x0012007c, 0x00000061}, |
| 169 | {0x00220024, 0x00000008}, |
| 170 | {0x0002003a, 0x00000002}, |
| 171 | {0x0022007d, 0x00000212}, |
| 172 | {0x0022007c, 0x00000061}, |
| 173 | {0x00020056, 0x00000006}, |
| 174 | {0x00120056, 0x0000000a}, |
| 175 | {0x00220056, 0x0000000a}, |
| 176 | {0x0001004d, 0x0000001a}, |
| 177 | {0x0001014d, 0x0000001a}, |
| 178 | {0x0001104d, 0x0000001a}, |
| 179 | {0x0001114d, 0x0000001a}, |
| 180 | {0x0011004d, 0x0000001a}, |
| 181 | {0x0011014d, 0x0000001a}, |
| 182 | {0x0011104d, 0x0000001a}, |
| 183 | {0x0011114d, 0x0000001a}, |
| 184 | {0x0021004d, 0x0000001a}, |
| 185 | {0x0021014d, 0x0000001a}, |
| 186 | {0x0021104d, 0x0000001a}, |
| 187 | {0x0021114d, 0x0000001a}, |
| 188 | {0x00010049, 0x00000e38}, |
| 189 | {0x00010149, 0x00000e38}, |
| 190 | {0x00011049, 0x00000e38}, |
| 191 | {0x00011149, 0x00000e38}, |
| 192 | {0x00110049, 0x00000e38}, |
| 193 | {0x00110149, 0x00000e38}, |
| 194 | {0x00111049, 0x00000e38}, |
| 195 | {0x00111149, 0x00000e38}, |
| 196 | {0x00210049, 0x00000e38}, |
| 197 | {0x00210149, 0x00000e38}, |
| 198 | {0x00211049, 0x00000e38}, |
| 199 | {0x00211149, 0x00000e38}, |
| 200 | {0x00000043, 0x00000063}, |
| 201 | {0x00001043, 0x00000063}, |
| 202 | {0x00002043, 0x00000063}, |
| 203 | {0x00003043, 0x00000063}, |
| 204 | {0x00004043, 0x00000063}, |
| 205 | {0x00005043, 0x00000063}, |
| 206 | {0x00006043, 0x00000063}, |
| 207 | {0x00007043, 0x00000063}, |
| 208 | {0x00008043, 0x00000063}, |
| 209 | {0x00009043, 0x00000063}, |
| 210 | {0x00020018, 0x00000001}, |
| 211 | {0x00020075, 0x00000002}, |
| 212 | {0x00020050, 0x00000000}, |
| 213 | {0x00020008, 0x00000258}, |
| 214 | {0x00120008, 0x00000064}, |
| 215 | {0x00220008, 0x00000019}, |
| 216 | {0x00020088, 0x00000009}, |
| 217 | {0x000200b2, 0x00000268}, |
| 218 | {0x00010043, 0x000005b1}, |
| 219 | {0x00010143, 0x000005b1}, |
| 220 | {0x00011043, 0x000005b1}, |
| 221 | {0x00011143, 0x000005b1}, |
| 222 | {0x001200b2, 0x00000268}, |
| 223 | {0x00110043, 0x000005b1}, |
| 224 | {0x00110143, 0x000005b1}, |
| 225 | {0x00111043, 0x000005b1}, |
| 226 | {0x00111143, 0x000005b1}, |
| 227 | {0x002200b2, 0x00000268}, |
| 228 | {0x00210043, 0x000005b1}, |
| 229 | {0x00210143, 0x000005b1}, |
| 230 | {0x00211043, 0x000005b1}, |
| 231 | {0x00211143, 0x000005b1}, |
| 232 | {0x0002005b, 0x00007529}, |
| 233 | {0x0002005c, 0x00000000}, |
| 234 | {0x000200fa, 0x00000001}, |
| 235 | {0x001200fa, 0x00000001}, |
| 236 | {0x002200fa, 0x00000001}, |
| 237 | {0x00020019, 0x00000005}, |
| 238 | {0x00120019, 0x00000005}, |
| 239 | {0x00220019, 0x00000005}, |
| 240 | {0x000200f0, 0x00005665}, |
| 241 | {0x000200f1, 0x00005555}, |
| 242 | {0x000200f2, 0x00005555}, |
| 243 | {0x000200f3, 0x00005555}, |
| 244 | {0x000200f4, 0x00005555}, |
| 245 | {0x000200f5, 0x00005555}, |
| 246 | {0x000200f6, 0x00005555}, |
| 247 | {0x000200f7, 0x0000f000}, |
| 248 | {0x0001004a, 0x00000500}, |
| 249 | {0x0001104a, 0x00000500}, |
| 250 | {0x00020025, 0x00000000}, |
| 251 | {0x0002002d, 0x00000000}, |
| 252 | {0x0012002d, 0x00000000}, |
| 253 | {0x0022002d, 0x00000000}, |
| 254 | {0x0002002c, 0x00000000}, |
| 255 | {0x000200c7, 0x00000021}, |
| 256 | {0x000200ca, 0x00000024}, |
| 257 | {0x000200cc, 0x000001f7}, |
| 258 | {0x001200c7, 0x00000021}, |
| 259 | {0x001200ca, 0x00000024}, |
| 260 | {0x001200cc, 0x000001f7}, |
| 261 | {0x002200c7, 0x00000021}, |
| 262 | {0x002200ca, 0x00000024}, |
| 263 | {0x002200cc, 0x000001f7}, |
| 264 | }; |
| 265 | |
| 266 | /* ddr phy trained csr */ |
| 267 | struct dram_cfg_param ddr_ddrphy_trained_csr[] = { |
| 268 | {0x0200b2, 0x0}, |
| 269 | {0x1200b2, 0x0}, |
| 270 | {0x2200b2, 0x0}, |
| 271 | {0x0200cb, 0x0}, |
| 272 | {0x010043, 0x0}, |
| 273 | {0x110043, 0x0}, |
| 274 | {0x210043, 0x0}, |
| 275 | {0x010143, 0x0}, |
| 276 | {0x110143, 0x0}, |
| 277 | {0x210143, 0x0}, |
| 278 | {0x011043, 0x0}, |
| 279 | {0x111043, 0x0}, |
| 280 | {0x211043, 0x0}, |
| 281 | {0x011143, 0x0}, |
| 282 | {0x111143, 0x0}, |
| 283 | {0x211143, 0x0}, |
| 284 | {0x000080, 0x0}, |
| 285 | {0x100080, 0x0}, |
| 286 | {0x200080, 0x0}, |
| 287 | {0x001080, 0x0}, |
| 288 | {0x101080, 0x0}, |
| 289 | {0x201080, 0x0}, |
| 290 | {0x002080, 0x0}, |
| 291 | {0x102080, 0x0}, |
| 292 | {0x202080, 0x0}, |
| 293 | {0x003080, 0x0}, |
| 294 | {0x103080, 0x0}, |
| 295 | {0x203080, 0x0}, |
| 296 | {0x004080, 0x0}, |
| 297 | {0x104080, 0x0}, |
| 298 | {0x204080, 0x0}, |
| 299 | {0x005080, 0x0}, |
| 300 | {0x105080, 0x0}, |
| 301 | {0x205080, 0x0}, |
| 302 | {0x006080, 0x0}, |
| 303 | {0x106080, 0x0}, |
| 304 | {0x206080, 0x0}, |
| 305 | {0x007080, 0x0}, |
| 306 | {0x107080, 0x0}, |
| 307 | {0x207080, 0x0}, |
| 308 | {0x008080, 0x0}, |
| 309 | {0x108080, 0x0}, |
| 310 | {0x208080, 0x0}, |
| 311 | {0x009080, 0x0}, |
| 312 | {0x109080, 0x0}, |
| 313 | {0x209080, 0x0}, |
| 314 | {0x010080, 0x0}, |
| 315 | {0x110080, 0x0}, |
| 316 | {0x210080, 0x0}, |
| 317 | {0x010180, 0x0}, |
| 318 | {0x110180, 0x0}, |
| 319 | {0x210180, 0x0}, |
| 320 | {0x010081, 0x0}, |
| 321 | {0x110081, 0x0}, |
| 322 | {0x210081, 0x0}, |
| 323 | {0x010181, 0x0}, |
| 324 | {0x110181, 0x0}, |
| 325 | {0x210181, 0x0}, |
| 326 | {0x010082, 0x0}, |
| 327 | {0x110082, 0x0}, |
| 328 | {0x210082, 0x0}, |
| 329 | {0x010182, 0x0}, |
| 330 | {0x110182, 0x0}, |
| 331 | {0x210182, 0x0}, |
| 332 | {0x010083, 0x0}, |
| 333 | {0x110083, 0x0}, |
| 334 | {0x210083, 0x0}, |
| 335 | {0x010183, 0x0}, |
| 336 | {0x110183, 0x0}, |
| 337 | {0x210183, 0x0}, |
| 338 | {0x011080, 0x0}, |
| 339 | {0x111080, 0x0}, |
| 340 | {0x211080, 0x0}, |
| 341 | {0x011180, 0x0}, |
| 342 | {0x111180, 0x0}, |
| 343 | {0x211180, 0x0}, |
| 344 | {0x011081, 0x0}, |
| 345 | {0x111081, 0x0}, |
| 346 | {0x211081, 0x0}, |
| 347 | {0x011181, 0x0}, |
| 348 | {0x111181, 0x0}, |
| 349 | {0x211181, 0x0}, |
| 350 | {0x011082, 0x0}, |
| 351 | {0x111082, 0x0}, |
| 352 | {0x211082, 0x0}, |
| 353 | {0x011182, 0x0}, |
| 354 | {0x111182, 0x0}, |
| 355 | {0x211182, 0x0}, |
| 356 | {0x011083, 0x0}, |
| 357 | {0x111083, 0x0}, |
| 358 | {0x211083, 0x0}, |
| 359 | {0x011183, 0x0}, |
| 360 | {0x111183, 0x0}, |
| 361 | {0x211183, 0x0}, |
| 362 | {0x0100d0, 0x0}, |
| 363 | {0x1100d0, 0x0}, |
| 364 | {0x2100d0, 0x0}, |
| 365 | {0x0101d0, 0x0}, |
| 366 | {0x1101d0, 0x0}, |
| 367 | {0x2101d0, 0x0}, |
| 368 | {0x0100d1, 0x0}, |
| 369 | {0x1100d1, 0x0}, |
| 370 | {0x2100d1, 0x0}, |
| 371 | {0x0101d1, 0x0}, |
| 372 | {0x1101d1, 0x0}, |
| 373 | {0x2101d1, 0x0}, |
| 374 | {0x0100d2, 0x0}, |
| 375 | {0x1100d2, 0x0}, |
| 376 | {0x2100d2, 0x0}, |
| 377 | {0x0101d2, 0x0}, |
| 378 | {0x1101d2, 0x0}, |
| 379 | {0x2101d2, 0x0}, |
| 380 | {0x0100d3, 0x0}, |
| 381 | {0x1100d3, 0x0}, |
| 382 | {0x2100d3, 0x0}, |
| 383 | {0x0101d3, 0x0}, |
| 384 | {0x1101d3, 0x0}, |
| 385 | {0x2101d3, 0x0}, |
| 386 | {0x0110d0, 0x0}, |
| 387 | {0x1110d0, 0x0}, |
| 388 | {0x2110d0, 0x0}, |
| 389 | {0x0111d0, 0x0}, |
| 390 | {0x1111d0, 0x0}, |
| 391 | {0x2111d0, 0x0}, |
| 392 | {0x0110d1, 0x0}, |
| 393 | {0x1110d1, 0x0}, |
| 394 | {0x2110d1, 0x0}, |
| 395 | {0x0111d1, 0x0}, |
| 396 | {0x1111d1, 0x0}, |
| 397 | {0x2111d1, 0x0}, |
| 398 | {0x0110d2, 0x0}, |
| 399 | {0x1110d2, 0x0}, |
| 400 | {0x2110d2, 0x0}, |
| 401 | {0x0111d2, 0x0}, |
| 402 | {0x1111d2, 0x0}, |
| 403 | {0x2111d2, 0x0}, |
| 404 | {0x0110d3, 0x0}, |
| 405 | {0x1110d3, 0x0}, |
| 406 | {0x2110d3, 0x0}, |
| 407 | {0x0111d3, 0x0}, |
| 408 | {0x1111d3, 0x0}, |
| 409 | {0x2111d3, 0x0}, |
| 410 | {0x010068, 0x0}, |
| 411 | {0x010168, 0x0}, |
| 412 | {0x010268, 0x0}, |
| 413 | {0x010368, 0x0}, |
| 414 | {0x010468, 0x0}, |
| 415 | {0x010568, 0x0}, |
| 416 | {0x010668, 0x0}, |
| 417 | {0x010768, 0x0}, |
| 418 | {0x010868, 0x0}, |
| 419 | {0x010069, 0x0}, |
| 420 | {0x010169, 0x0}, |
| 421 | {0x010269, 0x0}, |
| 422 | {0x010369, 0x0}, |
| 423 | {0x010469, 0x0}, |
| 424 | {0x010569, 0x0}, |
| 425 | {0x010669, 0x0}, |
| 426 | {0x010769, 0x0}, |
| 427 | {0x010869, 0x0}, |
| 428 | {0x01006a, 0x0}, |
| 429 | {0x01016a, 0x0}, |
| 430 | {0x01026a, 0x0}, |
| 431 | {0x01036a, 0x0}, |
| 432 | {0x01046a, 0x0}, |
| 433 | {0x01056a, 0x0}, |
| 434 | {0x01066a, 0x0}, |
| 435 | {0x01076a, 0x0}, |
| 436 | {0x01086a, 0x0}, |
| 437 | {0x01006b, 0x0}, |
| 438 | {0x01016b, 0x0}, |
| 439 | {0x01026b, 0x0}, |
| 440 | {0x01036b, 0x0}, |
| 441 | {0x01046b, 0x0}, |
| 442 | {0x01056b, 0x0}, |
| 443 | {0x01066b, 0x0}, |
| 444 | {0x01076b, 0x0}, |
| 445 | {0x01086b, 0x0}, |
| 446 | {0x011068, 0x0}, |
| 447 | {0x011168, 0x0}, |
| 448 | {0x011268, 0x0}, |
| 449 | {0x011368, 0x0}, |
| 450 | {0x011468, 0x0}, |
| 451 | {0x011568, 0x0}, |
| 452 | {0x011668, 0x0}, |
| 453 | {0x011768, 0x0}, |
| 454 | {0x011868, 0x0}, |
| 455 | {0x011069, 0x0}, |
| 456 | {0x011169, 0x0}, |
| 457 | {0x011269, 0x0}, |
| 458 | {0x011369, 0x0}, |
| 459 | {0x011469, 0x0}, |
| 460 | {0x011569, 0x0}, |
| 461 | {0x011669, 0x0}, |
| 462 | {0x011769, 0x0}, |
| 463 | {0x011869, 0x0}, |
| 464 | {0x01106a, 0x0}, |
| 465 | {0x01116a, 0x0}, |
| 466 | {0x01126a, 0x0}, |
| 467 | {0x01136a, 0x0}, |
| 468 | {0x01146a, 0x0}, |
| 469 | {0x01156a, 0x0}, |
| 470 | {0x01166a, 0x0}, |
| 471 | {0x01176a, 0x0}, |
| 472 | {0x01186a, 0x0}, |
| 473 | {0x01106b, 0x0}, |
| 474 | {0x01116b, 0x0}, |
| 475 | {0x01126b, 0x0}, |
| 476 | {0x01136b, 0x0}, |
| 477 | {0x01146b, 0x0}, |
| 478 | {0x01156b, 0x0}, |
| 479 | {0x01166b, 0x0}, |
| 480 | {0x01176b, 0x0}, |
| 481 | {0x01186b, 0x0}, |
| 482 | {0x01008c, 0x0}, |
| 483 | {0x11008c, 0x0}, |
| 484 | {0x21008c, 0x0}, |
| 485 | {0x01018c, 0x0}, |
| 486 | {0x11018c, 0x0}, |
| 487 | {0x21018c, 0x0}, |
| 488 | {0x01008d, 0x0}, |
| 489 | {0x11008d, 0x0}, |
| 490 | {0x21008d, 0x0}, |
| 491 | {0x01018d, 0x0}, |
| 492 | {0x11018d, 0x0}, |
| 493 | {0x21018d, 0x0}, |
| 494 | {0x01008e, 0x0}, |
| 495 | {0x11008e, 0x0}, |
| 496 | {0x21008e, 0x0}, |
| 497 | {0x01018e, 0x0}, |
| 498 | {0x11018e, 0x0}, |
| 499 | {0x21018e, 0x0}, |
| 500 | {0x01008f, 0x0}, |
| 501 | {0x11008f, 0x0}, |
| 502 | {0x21008f, 0x0}, |
| 503 | {0x01018f, 0x0}, |
| 504 | {0x11018f, 0x0}, |
| 505 | {0x21018f, 0x0}, |
| 506 | {0x01108c, 0x0}, |
| 507 | {0x11108c, 0x0}, |
| 508 | {0x21108c, 0x0}, |
| 509 | {0x01118c, 0x0}, |
| 510 | {0x11118c, 0x0}, |
| 511 | {0x21118c, 0x0}, |
| 512 | {0x01108d, 0x0}, |
| 513 | {0x11108d, 0x0}, |
| 514 | {0x21108d, 0x0}, |
| 515 | {0x01118d, 0x0}, |
| 516 | {0x11118d, 0x0}, |
| 517 | {0x21118d, 0x0}, |
| 518 | {0x01108e, 0x0}, |
| 519 | {0x11108e, 0x0}, |
| 520 | {0x21108e, 0x0}, |
| 521 | {0x01118e, 0x0}, |
| 522 | {0x11118e, 0x0}, |
| 523 | {0x21118e, 0x0}, |
| 524 | {0x01108f, 0x0}, |
| 525 | {0x11108f, 0x0}, |
| 526 | {0x21108f, 0x0}, |
| 527 | {0x01118f, 0x0}, |
| 528 | {0x11118f, 0x0}, |
| 529 | {0x21118f, 0x0}, |
| 530 | {0x0100c0, 0x0}, |
| 531 | {0x1100c0, 0x0}, |
| 532 | {0x2100c0, 0x0}, |
| 533 | {0x0101c0, 0x0}, |
| 534 | {0x1101c0, 0x0}, |
| 535 | {0x2101c0, 0x0}, |
| 536 | {0x0102c0, 0x0}, |
| 537 | {0x1102c0, 0x0}, |
| 538 | {0x2102c0, 0x0}, |
| 539 | {0x0103c0, 0x0}, |
| 540 | {0x1103c0, 0x0}, |
| 541 | {0x2103c0, 0x0}, |
| 542 | {0x0104c0, 0x0}, |
| 543 | {0x1104c0, 0x0}, |
| 544 | {0x2104c0, 0x0}, |
| 545 | {0x0105c0, 0x0}, |
| 546 | {0x1105c0, 0x0}, |
| 547 | {0x2105c0, 0x0}, |
| 548 | {0x0106c0, 0x0}, |
| 549 | {0x1106c0, 0x0}, |
| 550 | {0x2106c0, 0x0}, |
| 551 | {0x0107c0, 0x0}, |
| 552 | {0x1107c0, 0x0}, |
| 553 | {0x2107c0, 0x0}, |
| 554 | {0x0108c0, 0x0}, |
| 555 | {0x1108c0, 0x0}, |
| 556 | {0x2108c0, 0x0}, |
| 557 | {0x0100c1, 0x0}, |
| 558 | {0x1100c1, 0x0}, |
| 559 | {0x2100c1, 0x0}, |
| 560 | {0x0101c1, 0x0}, |
| 561 | {0x1101c1, 0x0}, |
| 562 | {0x2101c1, 0x0}, |
| 563 | {0x0102c1, 0x0}, |
| 564 | {0x1102c1, 0x0}, |
| 565 | {0x2102c1, 0x0}, |
| 566 | {0x0103c1, 0x0}, |
| 567 | {0x1103c1, 0x0}, |
| 568 | {0x2103c1, 0x0}, |
| 569 | {0x0104c1, 0x0}, |
| 570 | {0x1104c1, 0x0}, |
| 571 | {0x2104c1, 0x0}, |
| 572 | {0x0105c1, 0x0}, |
| 573 | {0x1105c1, 0x0}, |
| 574 | {0x2105c1, 0x0}, |
| 575 | {0x0106c1, 0x0}, |
| 576 | {0x1106c1, 0x0}, |
| 577 | {0x2106c1, 0x0}, |
| 578 | {0x0107c1, 0x0}, |
| 579 | {0x1107c1, 0x0}, |
| 580 | {0x2107c1, 0x0}, |
| 581 | {0x0108c1, 0x0}, |
| 582 | {0x1108c1, 0x0}, |
| 583 | {0x2108c1, 0x0}, |
| 584 | {0x0100c2, 0x0}, |
| 585 | {0x1100c2, 0x0}, |
| 586 | {0x2100c2, 0x0}, |
| 587 | {0x0101c2, 0x0}, |
| 588 | {0x1101c2, 0x0}, |
| 589 | {0x2101c2, 0x0}, |
| 590 | {0x0102c2, 0x0}, |
| 591 | {0x1102c2, 0x0}, |
| 592 | {0x2102c2, 0x0}, |
| 593 | {0x0103c2, 0x0}, |
| 594 | {0x1103c2, 0x0}, |
| 595 | {0x2103c2, 0x0}, |
| 596 | {0x0104c2, 0x0}, |
| 597 | {0x1104c2, 0x0}, |
| 598 | {0x2104c2, 0x0}, |
| 599 | {0x0105c2, 0x0}, |
| 600 | {0x1105c2, 0x0}, |
| 601 | {0x2105c2, 0x0}, |
| 602 | {0x0106c2, 0x0}, |
| 603 | {0x1106c2, 0x0}, |
| 604 | {0x2106c2, 0x0}, |
| 605 | {0x0107c2, 0x0}, |
| 606 | {0x1107c2, 0x0}, |
| 607 | {0x2107c2, 0x0}, |
| 608 | {0x0108c2, 0x0}, |
| 609 | {0x1108c2, 0x0}, |
| 610 | {0x2108c2, 0x0}, |
| 611 | {0x0100c3, 0x0}, |
| 612 | {0x1100c3, 0x0}, |
| 613 | {0x2100c3, 0x0}, |
| 614 | {0x0101c3, 0x0}, |
| 615 | {0x1101c3, 0x0}, |
| 616 | {0x2101c3, 0x0}, |
| 617 | {0x0102c3, 0x0}, |
| 618 | {0x1102c3, 0x0}, |
| 619 | {0x2102c3, 0x0}, |
| 620 | {0x0103c3, 0x0}, |
| 621 | {0x1103c3, 0x0}, |
| 622 | {0x2103c3, 0x0}, |
| 623 | {0x0104c3, 0x0}, |
| 624 | {0x1104c3, 0x0}, |
| 625 | {0x2104c3, 0x0}, |
| 626 | {0x0105c3, 0x0}, |
| 627 | {0x1105c3, 0x0}, |
| 628 | {0x2105c3, 0x0}, |
| 629 | {0x0106c3, 0x0}, |
| 630 | {0x1106c3, 0x0}, |
| 631 | {0x2106c3, 0x0}, |
| 632 | {0x0107c3, 0x0}, |
| 633 | {0x1107c3, 0x0}, |
| 634 | {0x2107c3, 0x0}, |
| 635 | {0x0108c3, 0x0}, |
| 636 | {0x1108c3, 0x0}, |
| 637 | {0x2108c3, 0x0}, |
| 638 | {0x0110c0, 0x0}, |
| 639 | {0x1110c0, 0x0}, |
| 640 | {0x2110c0, 0x0}, |
| 641 | {0x0111c0, 0x0}, |
| 642 | {0x1111c0, 0x0}, |
| 643 | {0x2111c0, 0x0}, |
| 644 | {0x0112c0, 0x0}, |
| 645 | {0x1112c0, 0x0}, |
| 646 | {0x2112c0, 0x0}, |
| 647 | {0x0113c0, 0x0}, |
| 648 | {0x1113c0, 0x0}, |
| 649 | {0x2113c0, 0x0}, |
| 650 | {0x0114c0, 0x0}, |
| 651 | {0x1114c0, 0x0}, |
| 652 | {0x2114c0, 0x0}, |
| 653 | {0x0115c0, 0x0}, |
| 654 | {0x1115c0, 0x0}, |
| 655 | {0x2115c0, 0x0}, |
| 656 | {0x0116c0, 0x0}, |
| 657 | {0x1116c0, 0x0}, |
| 658 | {0x2116c0, 0x0}, |
| 659 | {0x0117c0, 0x0}, |
| 660 | {0x1117c0, 0x0}, |
| 661 | {0x2117c0, 0x0}, |
| 662 | {0x0118c0, 0x0}, |
| 663 | {0x1118c0, 0x0}, |
| 664 | {0x2118c0, 0x0}, |
| 665 | {0x0110c1, 0x0}, |
| 666 | {0x1110c1, 0x0}, |
| 667 | {0x2110c1, 0x0}, |
| 668 | {0x0111c1, 0x0}, |
| 669 | {0x1111c1, 0x0}, |
| 670 | {0x2111c1, 0x0}, |
| 671 | {0x0112c1, 0x0}, |
| 672 | {0x1112c1, 0x0}, |
| 673 | {0x2112c1, 0x0}, |
| 674 | {0x0113c1, 0x0}, |
| 675 | {0x1113c1, 0x0}, |
| 676 | {0x2113c1, 0x0}, |
| 677 | {0x0114c1, 0x0}, |
| 678 | {0x1114c1, 0x0}, |
| 679 | {0x2114c1, 0x0}, |
| 680 | {0x0115c1, 0x0}, |
| 681 | {0x1115c1, 0x0}, |
| 682 | {0x2115c1, 0x0}, |
| 683 | {0x0116c1, 0x0}, |
| 684 | {0x1116c1, 0x0}, |
| 685 | {0x2116c1, 0x0}, |
| 686 | {0x0117c1, 0x0}, |
| 687 | {0x1117c1, 0x0}, |
| 688 | {0x2117c1, 0x0}, |
| 689 | {0x0118c1, 0x0}, |
| 690 | {0x1118c1, 0x0}, |
| 691 | {0x2118c1, 0x0}, |
| 692 | {0x0110c2, 0x0}, |
| 693 | {0x1110c2, 0x0}, |
| 694 | {0x2110c2, 0x0}, |
| 695 | {0x0111c2, 0x0}, |
| 696 | {0x1111c2, 0x0}, |
| 697 | {0x2111c2, 0x0}, |
| 698 | {0x0112c2, 0x0}, |
| 699 | {0x1112c2, 0x0}, |
| 700 | {0x2112c2, 0x0}, |
| 701 | {0x0113c2, 0x0}, |
| 702 | {0x1113c2, 0x0}, |
| 703 | {0x2113c2, 0x0}, |
| 704 | {0x0114c2, 0x0}, |
| 705 | {0x1114c2, 0x0}, |
| 706 | {0x2114c2, 0x0}, |
| 707 | {0x0115c2, 0x0}, |
| 708 | {0x1115c2, 0x0}, |
| 709 | {0x2115c2, 0x0}, |
| 710 | {0x0116c2, 0x0}, |
| 711 | {0x1116c2, 0x0}, |
| 712 | {0x2116c2, 0x0}, |
| 713 | {0x0117c2, 0x0}, |
| 714 | {0x1117c2, 0x0}, |
| 715 | {0x2117c2, 0x0}, |
| 716 | {0x0118c2, 0x0}, |
| 717 | {0x1118c2, 0x0}, |
| 718 | {0x2118c2, 0x0}, |
| 719 | {0x0110c3, 0x0}, |
| 720 | {0x1110c3, 0x0}, |
| 721 | {0x2110c3, 0x0}, |
| 722 | {0x0111c3, 0x0}, |
| 723 | {0x1111c3, 0x0}, |
| 724 | {0x2111c3, 0x0}, |
| 725 | {0x0112c3, 0x0}, |
| 726 | {0x1112c3, 0x0}, |
| 727 | {0x2112c3, 0x0}, |
| 728 | {0x0113c3, 0x0}, |
| 729 | {0x1113c3, 0x0}, |
| 730 | {0x2113c3, 0x0}, |
| 731 | {0x0114c3, 0x0}, |
| 732 | {0x1114c3, 0x0}, |
| 733 | {0x2114c3, 0x0}, |
| 734 | {0x0115c3, 0x0}, |
| 735 | {0x1115c3, 0x0}, |
| 736 | {0x2115c3, 0x0}, |
| 737 | {0x0116c3, 0x0}, |
| 738 | {0x1116c3, 0x0}, |
| 739 | {0x2116c3, 0x0}, |
| 740 | {0x0117c3, 0x0}, |
| 741 | {0x1117c3, 0x0}, |
| 742 | {0x2117c3, 0x0}, |
| 743 | {0x0118c3, 0x0}, |
| 744 | {0x1118c3, 0x0}, |
| 745 | {0x2118c3, 0x0}, |
| 746 | {0x010020, 0x0}, |
| 747 | {0x110020, 0x0}, |
| 748 | {0x210020, 0x0}, |
| 749 | {0x011020, 0x0}, |
| 750 | {0x111020, 0x0}, |
| 751 | {0x211020, 0x0}, |
| 752 | {0x02007d, 0x0}, |
| 753 | {0x12007d, 0x0}, |
| 754 | {0x22007d, 0x0}, |
| 755 | {0x010040, 0x0}, |
| 756 | {0x010140, 0x0}, |
| 757 | {0x010240, 0x0}, |
| 758 | {0x010340, 0x0}, |
| 759 | {0x010440, 0x0}, |
| 760 | {0x010540, 0x0}, |
| 761 | {0x010640, 0x0}, |
| 762 | {0x010740, 0x0}, |
| 763 | {0x010840, 0x0}, |
| 764 | {0x010030, 0x0}, |
| 765 | {0x010130, 0x0}, |
| 766 | {0x010230, 0x0}, |
| 767 | {0x010330, 0x0}, |
| 768 | {0x010430, 0x0}, |
| 769 | {0x010530, 0x0}, |
| 770 | {0x010630, 0x0}, |
| 771 | {0x010730, 0x0}, |
| 772 | {0x010830, 0x0}, |
| 773 | {0x011040, 0x0}, |
| 774 | {0x011140, 0x0}, |
| 775 | {0x011240, 0x0}, |
| 776 | {0x011340, 0x0}, |
| 777 | {0x011440, 0x0}, |
| 778 | {0x011540, 0x0}, |
| 779 | {0x011640, 0x0}, |
| 780 | {0x011740, 0x0}, |
| 781 | {0x011840, 0x0}, |
| 782 | {0x011030, 0x0}, |
| 783 | {0x011130, 0x0}, |
| 784 | {0x011230, 0x0}, |
| 785 | {0x011330, 0x0}, |
| 786 | {0x011430, 0x0}, |
| 787 | {0x011530, 0x0}, |
| 788 | {0x011630, 0x0}, |
| 789 | {0x011730, 0x0}, |
| 790 | {0x011830, 0x0}, |
| 791 | }; |
| 792 | |
| 793 | /* P0 message block paremeter for training firmware */ |
| 794 | struct dram_cfg_param ddr_fsp0_cfg[] = { |
| 795 | {0x000d0000, 0x00000000}, |
| 796 | {0x00020060, 0x00000002}, |
| 797 | {0x00054000, 0x00000000}, |
| 798 | {0x00054001, 0x00000000}, |
| 799 | {0x00054002, 0x00000000}, |
| 800 | {0x00054003, 0x00000960}, |
| 801 | {0x00054004, 0x00000002}, |
| 802 | {0x00054005, 0x00000000}, |
| 803 | {0x00054006, 0x0000025e}, |
| 804 | {0x00054007, 0x00001000}, |
| 805 | {0x00054008, 0x00000101}, |
| 806 | {0x00054009, 0x00000000}, |
| 807 | {0x0005400a, 0x00000000}, |
| 808 | {0x0005400b, 0x0000031f}, |
| 809 | {0x0005400c, 0x000000c8}, |
| 810 | {0x0005400d, 0x00000100}, |
| 811 | {0x0005400e, 0x00000000}, |
| 812 | {0x0005400f, 0x00000000}, |
| 813 | {0x00054010, 0x00000000}, |
| 814 | {0x00054011, 0x00000000}, |
| 815 | {0x00054012, 0x00000001}, |
| 816 | {0x0005402f, 0x00000834}, |
| 817 | {0x00054030, 0x00000105}, |
| 818 | {0x00054031, 0x00000018}, |
| 819 | {0x00054032, 0x00000200}, |
| 820 | {0x00054033, 0x00000200}, |
| 821 | {0x00054034, 0x00000740}, |
| 822 | {0x00054035, 0x00000850}, |
| 823 | {0x00054036, 0x00000103}, |
| 824 | {0x00054037, 0x00000000}, |
| 825 | {0x00054038, 0x00000000}, |
| 826 | {0x00054039, 0x00000000}, |
| 827 | {0x0005403a, 0x00000000}, |
| 828 | {0x0005403b, 0x00000000}, |
| 829 | {0x0005403c, 0x00000000}, |
| 830 | {0x0005403d, 0x00000000}, |
| 831 | {0x0005403e, 0x00000000}, |
| 832 | {0x0005403f, 0x00001221}, |
| 833 | {0x000541fc, 0x00000100}, |
| 834 | {0x000d0000, 0x00000001}, |
| 835 | }; |
| 836 | |
| 837 | /* P1 message block paremeter for training firmware */ |
| 838 | struct dram_cfg_param ddr_fsp1_cfg[] = { |
| 839 | {0x000d0000, 0x00000000}, |
| 840 | {0x00054000, 0x00000000}, |
| 841 | {0x00054001, 0x00000000}, |
| 842 | {0x00054002, 0x00000101}, |
| 843 | {0x00054003, 0x00000190}, |
| 844 | {0x00054004, 0x00000002}, |
| 845 | {0x00054005, 0x00000000}, |
| 846 | {0x00054006, 0x0000025e}, |
| 847 | {0x00054007, 0x00001000}, |
| 848 | {0x00054008, 0x00000101}, |
| 849 | {0x00054009, 0x00000000}, |
| 850 | {0x0005400a, 0x00000000}, |
| 851 | {0x0005400b, 0x0000021f}, |
| 852 | {0x0005400c, 0x000000c8}, |
| 853 | {0x0005400d, 0x00000100}, |
| 854 | {0x0005400e, 0x00000000}, |
| 855 | {0x0005400f, 0x00000000}, |
| 856 | {0x00054010, 0x00000000}, |
| 857 | {0x00054011, 0x00000000}, |
| 858 | {0x00054012, 0x00000001}, |
| 859 | {0x0005402f, 0x00000000}, |
| 860 | {0x00054030, 0x00000105}, |
| 861 | {0x00054031, 0x00000000}, |
| 862 | {0x00054032, 0x00000000}, |
| 863 | {0x00054033, 0x00000200}, |
| 864 | {0x00054034, 0x00000740}, |
| 865 | {0x00054035, 0x00000050}, |
| 866 | {0x00054036, 0x00000103}, |
| 867 | {0x00054037, 0x00000000}, |
| 868 | {0x00054038, 0x00000000}, |
| 869 | {0x00054039, 0x00000000}, |
| 870 | {0x0005403a, 0x00000000}, |
| 871 | {0x0005403b, 0x00000000}, |
| 872 | {0x0005403c, 0x00000000}, |
| 873 | {0x0005403d, 0x00000000}, |
| 874 | {0x0005403e, 0x00000000}, |
| 875 | {0x0005403f, 0x00001221}, |
| 876 | {0x000541fc, 0x00000100}, |
| 877 | {0x000d0000, 0x00000001}, |
| 878 | }; |
| 879 | |
| 880 | /* P2 message block paremeter for training firmware */ |
| 881 | struct dram_cfg_param ddr_fsp2_cfg[] = { |
| 882 | {0x000d0000, 0x00000000}, |
| 883 | {0x00054000, 0x00000000}, |
| 884 | {0x00054001, 0x00000000}, |
| 885 | {0x00054002, 0x00000102}, |
| 886 | {0x00054003, 0x00000064}, |
| 887 | {0x00054004, 0x00000002}, |
| 888 | {0x00054005, 0x00000000}, |
| 889 | {0x00054006, 0x0000025e}, |
| 890 | {0x00054007, 0x00001000}, |
| 891 | {0x00054008, 0x00000101}, |
| 892 | {0x00054009, 0x00000000}, |
| 893 | {0x0005400a, 0x00000000}, |
| 894 | {0x0005400b, 0x0000021f}, |
| 895 | {0x0005400c, 0x000000c8}, |
| 896 | {0x0005400d, 0x00000100}, |
| 897 | {0x0005400e, 0x00000000}, |
| 898 | {0x0005400f, 0x00000000}, |
| 899 | {0x00054010, 0x00000000}, |
| 900 | {0x00054011, 0x00000000}, |
| 901 | {0x00054012, 0x00000001}, |
| 902 | {0x0005402f, 0x00000000}, |
| 903 | {0x00054030, 0x00000105}, |
| 904 | {0x00054031, 0x00000000}, |
| 905 | {0x00054032, 0x00000000}, |
| 906 | {0x00054033, 0x00000200}, |
| 907 | {0x00054034, 0x00000740}, |
| 908 | {0x00054035, 0x00000050}, |
| 909 | {0x00054036, 0x00000103}, |
| 910 | {0x00054037, 0x00000000}, |
| 911 | {0x00054038, 0x00000000}, |
| 912 | {0x00054039, 0x00000000}, |
| 913 | {0x0005403a, 0x00000000}, |
| 914 | {0x0005403b, 0x00000000}, |
| 915 | {0x0005403c, 0x00000000}, |
| 916 | {0x0005403d, 0x00000000}, |
| 917 | {0x0005403e, 0x00000000}, |
| 918 | {0x0005403f, 0x00001221}, |
| 919 | {0x000541fc, 0x00000100}, |
| 920 | {0x000d0000, 0x00000001}, |
| 921 | }; |
| 922 | |
| 923 | /* P0 2D message block paremeter for training firmware */ |
| 924 | struct dram_cfg_param ddr_fsp0_2d_cfg[] = { |
| 925 | {0x000d0000, 0x00000000}, |
| 926 | {0x00054000, 0x00000000}, |
| 927 | {0x00054001, 0x00000000}, |
| 928 | {0x00054002, 0x00000000}, |
| 929 | {0x00054003, 0x00000960}, |
| 930 | {0x00054004, 0x00000002}, |
| 931 | {0x00054005, 0x00000000}, |
| 932 | {0x00054006, 0x0000025e}, |
| 933 | {0x00054007, 0x00001000}, |
| 934 | {0x00054008, 0x00000101}, |
| 935 | {0x00054009, 0x00000000}, |
| 936 | {0x0005400a, 0x00000000}, |
| 937 | {0x0005400b, 0x00000061}, |
| 938 | {0x0005400c, 0x000000c8}, |
| 939 | {0x0005400d, 0x00000100}, |
| 940 | {0x0005400e, 0x00001f7f}, |
| 941 | {0x0005400f, 0x00000000}, |
| 942 | {0x00054010, 0x00000000}, |
| 943 | {0x00054011, 0x00000000}, |
| 944 | {0x00054012, 0x00000001}, |
| 945 | {0x0005402f, 0x00000834}, |
| 946 | {0x00054030, 0x00000105}, |
| 947 | {0x00054031, 0x00000018}, |
| 948 | {0x00054032, 0x00000200}, |
| 949 | {0x00054033, 0x00000200}, |
| 950 | {0x00054034, 0x00000740}, |
| 951 | {0x00054035, 0x00000850}, |
| 952 | {0x00054036, 0x00000103}, |
| 953 | {0x00054037, 0x00000000}, |
| 954 | {0x00054038, 0x00000000}, |
| 955 | {0x00054039, 0x00000000}, |
| 956 | {0x0005403a, 0x00000000}, |
| 957 | {0x0005403b, 0x00000000}, |
| 958 | {0x0005403c, 0x00000000}, |
| 959 | {0x0005403d, 0x00000000}, |
| 960 | {0x0005403e, 0x00000000}, |
| 961 | {0x0005403f, 0x00001221}, |
| 962 | {0x000541fc, 0x00000100}, |
| 963 | {0x000d0000, 0x00000001}, |
| 964 | }; |
| 965 | |
| 966 | /* DRAM PHY init engine image */ |
| 967 | struct dram_cfg_param ddr_phy_pie[] = { |
| 968 | {0xd0000, 0x0}, |
| 969 | {0x90000, 0x10}, |
| 970 | {0x90001, 0x400}, |
| 971 | {0x90002, 0x10e}, |
| 972 | {0x90003, 0x0}, |
| 973 | {0x90004, 0x0}, |
| 974 | {0x90005, 0x8}, |
| 975 | {0x90029, 0xb}, |
| 976 | {0x9002a, 0x480}, |
| 977 | {0x9002b, 0x109}, |
| 978 | {0x9002c, 0x8}, |
| 979 | {0x9002d, 0x448}, |
| 980 | {0x9002e, 0x139}, |
| 981 | {0x9002f, 0x8}, |
| 982 | {0x90030, 0x478}, |
| 983 | {0x90031, 0x109}, |
| 984 | {0x90032, 0x2}, |
| 985 | {0x90033, 0x10}, |
| 986 | {0x90034, 0x139}, |
| 987 | {0x90035, 0xb}, |
| 988 | {0x90036, 0x7c0}, |
| 989 | {0x90037, 0x139}, |
| 990 | {0x90038, 0x44}, |
| 991 | {0x90039, 0x633}, |
| 992 | {0x9003a, 0x159}, |
| 993 | {0x9003b, 0x14f}, |
| 994 | {0x9003c, 0x630}, |
| 995 | {0x9003d, 0x159}, |
| 996 | {0x9003e, 0x47}, |
| 997 | {0x9003f, 0x633}, |
| 998 | {0x90040, 0x149}, |
| 999 | {0x90041, 0x4f}, |
| 1000 | {0x90042, 0x633}, |
| 1001 | {0x90043, 0x179}, |
| 1002 | {0x90044, 0x8}, |
| 1003 | {0x90045, 0xe0}, |
| 1004 | {0x90046, 0x109}, |
| 1005 | {0x90047, 0x0}, |
| 1006 | {0x90048, 0x7c8}, |
| 1007 | {0x90049, 0x109}, |
| 1008 | {0x9004a, 0x0}, |
| 1009 | {0x9004b, 0x1}, |
| 1010 | {0x9004c, 0x8}, |
| 1011 | {0x9004d, 0x0}, |
| 1012 | {0x9004e, 0x45a}, |
| 1013 | {0x9004f, 0x9}, |
| 1014 | {0x90050, 0x0}, |
| 1015 | {0x90051, 0x448}, |
| 1016 | {0x90052, 0x109}, |
| 1017 | {0x90053, 0x40}, |
| 1018 | {0x90054, 0x633}, |
| 1019 | {0x90055, 0x179}, |
| 1020 | {0x90056, 0x1}, |
| 1021 | {0x90057, 0x618}, |
| 1022 | {0x90058, 0x109}, |
| 1023 | {0x90059, 0x40c0}, |
| 1024 | {0x9005a, 0x633}, |
| 1025 | {0x9005b, 0x149}, |
| 1026 | {0x9005c, 0x8}, |
| 1027 | {0x9005d, 0x4}, |
| 1028 | {0x9005e, 0x48}, |
| 1029 | {0x9005f, 0x4040}, |
| 1030 | {0x90060, 0x633}, |
| 1031 | {0x90061, 0x149}, |
| 1032 | {0x90062, 0x0}, |
| 1033 | {0x90063, 0x4}, |
| 1034 | {0x90064, 0x48}, |
| 1035 | {0x90065, 0x40}, |
| 1036 | {0x90066, 0x633}, |
| 1037 | {0x90067, 0x149}, |
| 1038 | {0x90068, 0x10}, |
| 1039 | {0x90069, 0x4}, |
| 1040 | {0x9006a, 0x18}, |
| 1041 | {0x9006b, 0x0}, |
| 1042 | {0x9006c, 0x4}, |
| 1043 | {0x9006d, 0x78}, |
| 1044 | {0x9006e, 0x549}, |
| 1045 | {0x9006f, 0x633}, |
| 1046 | {0x90070, 0x159}, |
| 1047 | {0x90071, 0xd49}, |
| 1048 | {0x90072, 0x633}, |
| 1049 | {0x90073, 0x159}, |
| 1050 | {0x90074, 0x94a}, |
| 1051 | {0x90075, 0x633}, |
| 1052 | {0x90076, 0x159}, |
| 1053 | {0x90077, 0x441}, |
| 1054 | {0x90078, 0x633}, |
| 1055 | {0x90079, 0x149}, |
| 1056 | {0x9007a, 0x42}, |
| 1057 | {0x9007b, 0x633}, |
| 1058 | {0x9007c, 0x149}, |
| 1059 | {0x9007d, 0x1}, |
| 1060 | {0x9007e, 0x633}, |
| 1061 | {0x9007f, 0x149}, |
| 1062 | {0x90080, 0x0}, |
| 1063 | {0x90081, 0xe0}, |
| 1064 | {0x90082, 0x109}, |
| 1065 | {0x90083, 0xa}, |
| 1066 | {0x90084, 0x10}, |
| 1067 | {0x90085, 0x109}, |
| 1068 | {0x90086, 0x9}, |
| 1069 | {0x90087, 0x3c0}, |
| 1070 | {0x90088, 0x149}, |
| 1071 | {0x90089, 0x9}, |
| 1072 | {0x9008a, 0x3c0}, |
| 1073 | {0x9008b, 0x159}, |
| 1074 | {0x9008c, 0x18}, |
| 1075 | {0x9008d, 0x10}, |
| 1076 | {0x9008e, 0x109}, |
| 1077 | {0x9008f, 0x0}, |
| 1078 | {0x90090, 0x3c0}, |
| 1079 | {0x90091, 0x109}, |
| 1080 | {0x90092, 0x18}, |
| 1081 | {0x90093, 0x4}, |
| 1082 | {0x90094, 0x48}, |
| 1083 | {0x90095, 0x18}, |
| 1084 | {0x90096, 0x4}, |
| 1085 | {0x90097, 0x58}, |
| 1086 | {0x90098, 0xb}, |
| 1087 | {0x90099, 0x10}, |
| 1088 | {0x9009a, 0x109}, |
| 1089 | {0x9009b, 0x1}, |
| 1090 | {0x9009c, 0x10}, |
| 1091 | {0x9009d, 0x109}, |
| 1092 | {0x9009e, 0x5}, |
| 1093 | {0x9009f, 0x7c0}, |
| 1094 | {0x900a0, 0x109}, |
| 1095 | {0x900a1, 0x0}, |
| 1096 | {0x900a2, 0x8140}, |
| 1097 | {0x900a3, 0x10c}, |
| 1098 | {0x900a4, 0x10}, |
| 1099 | {0x900a5, 0x8138}, |
| 1100 | {0x900a6, 0x10c}, |
| 1101 | {0x900a7, 0x8}, |
| 1102 | {0x900a8, 0x7c8}, |
| 1103 | {0x900a9, 0x101}, |
| 1104 | {0x900aa, 0x8}, |
| 1105 | {0x900ab, 0x448}, |
| 1106 | {0x900ac, 0x109}, |
| 1107 | {0x900ad, 0xf}, |
| 1108 | {0x900ae, 0x7c0}, |
| 1109 | {0x900af, 0x109}, |
| 1110 | {0x900b0, 0x47}, |
| 1111 | {0x900b1, 0x630}, |
| 1112 | {0x900b2, 0x109}, |
| 1113 | {0x900b3, 0x8}, |
| 1114 | {0x900b4, 0x618}, |
| 1115 | {0x900b5, 0x109}, |
| 1116 | {0x900b6, 0x8}, |
| 1117 | {0x900b7, 0xe0}, |
| 1118 | {0x900b8, 0x109}, |
| 1119 | {0x900b9, 0x0}, |
| 1120 | {0x900ba, 0x7c8}, |
| 1121 | {0x900bb, 0x109}, |
| 1122 | {0x900bc, 0x8}, |
| 1123 | {0x900bd, 0x8140}, |
| 1124 | {0x900be, 0x10c}, |
| 1125 | {0x900bf, 0x0}, |
| 1126 | {0x900c0, 0x1}, |
| 1127 | {0x900c1, 0x8}, |
| 1128 | {0x900c2, 0x8}, |
| 1129 | {0x900c3, 0x4}, |
| 1130 | {0x900c4, 0x8}, |
| 1131 | {0x900c5, 0x8}, |
| 1132 | {0x900c6, 0x7c8}, |
| 1133 | {0x900c7, 0x101}, |
| 1134 | {0x90006, 0x0}, |
| 1135 | {0x90007, 0x0}, |
| 1136 | {0x90008, 0x8}, |
| 1137 | {0x90009, 0x0}, |
| 1138 | {0x9000a, 0x0}, |
| 1139 | {0x9000b, 0x0}, |
| 1140 | {0xd00e7, 0x400}, |
| 1141 | {0x90017, 0x0}, |
| 1142 | {0x90026, 0x2b}, |
| 1143 | {0x2000b, 0x4b}, |
| 1144 | {0x2000c, 0x96}, |
| 1145 | {0x2000d, 0x5dc}, |
| 1146 | {0x2000e, 0x2c}, |
| 1147 | {0x12000b, 0xc}, |
| 1148 | {0x12000c, 0x16}, |
| 1149 | {0x12000d, 0xfa}, |
| 1150 | {0x12000e, 0x10}, |
| 1151 | {0x22000b, 0x3}, |
| 1152 | {0x22000c, 0x3}, |
| 1153 | {0x22000d, 0x3e}, |
| 1154 | {0x22000e, 0x10}, |
| 1155 | {0x9000c, 0x0}, |
| 1156 | {0x9000d, 0x173}, |
| 1157 | {0x9000e, 0x60}, |
| 1158 | {0x9000f, 0x6110}, |
| 1159 | {0x90010, 0x2152}, |
| 1160 | {0x90011, 0xdfbd}, |
| 1161 | {0x90012, 0xffff}, |
| 1162 | {0x90013, 0x6152}, |
| 1163 | {0x20089, 0x1}, |
| 1164 | {0x20088, 0x19}, |
| 1165 | {0xc0080, 0x0}, |
| 1166 | {0xd0000, 0x1}, |
| 1167 | }; |
| 1168 | |
| 1169 | struct dram_fsp_msg ddr_dram_fsp_msg[] = { |
| 1170 | { |
| 1171 | /* P0 2400mts 1D */ |
| 1172 | .drate = 2400, |
| 1173 | .fw_type = FW_1D_IMAGE, |
| 1174 | .fsp_cfg = ddr_fsp0_cfg, |
| 1175 | .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), |
| 1176 | }, |
| 1177 | { |
| 1178 | /* P1 400mts 1D */ |
| 1179 | .drate = 400, |
| 1180 | .fw_type = FW_1D_IMAGE, |
| 1181 | .fsp_cfg = ddr_fsp1_cfg, |
| 1182 | .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), |
| 1183 | }, |
| 1184 | { |
| 1185 | /* P2 100mts 1D */ |
| 1186 | .drate = 100, |
| 1187 | .fw_type = FW_1D_IMAGE, |
| 1188 | .fsp_cfg = ddr_fsp2_cfg, |
| 1189 | .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), |
| 1190 | }, |
| 1191 | { |
| 1192 | /* P0 2400mts 2D */ |
| 1193 | .drate = 2400, |
| 1194 | .fw_type = FW_2D_IMAGE, |
| 1195 | .fsp_cfg = ddr_fsp0_2d_cfg, |
| 1196 | .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), |
| 1197 | }, |
| 1198 | }; |
| 1199 | |
| 1200 | /* ddr timing config params */ |
| 1201 | struct dram_timing_info dram_timing = { |
| 1202 | .ddrc_cfg = ddr_ddrc_cfg, |
| 1203 | .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), |
| 1204 | .ddrphy_cfg = ddr_ddrphy_cfg, |
| 1205 | .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), |
| 1206 | .fsp_msg = ddr_dram_fsp_msg, |
| 1207 | .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), |
| 1208 | .ddrphy_trained_csr = ddr_ddrphy_trained_csr, |
| 1209 | .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), |
| 1210 | .ddrphy_pie = ddr_phy_pie, |
| 1211 | .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), |
| 1212 | .fsp_table = { 2400, 400, 100,}, |
| 1213 | }; |
| 1214 | |