blob: 97377697f097fdfc0d54b424cddd387e3117f995 [file] [log] [blame]
Peng Fan0c830d32018-10-18 14:28:07 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2018 NXP
4 */
5
6#ifndef _SC_SCI_H
7#define _SC_SCI_H
8
9#include <asm/arch/sci/types.h>
10#include <asm/arch/sci/svc/misc/api.h>
11#include <asm/arch/sci/svc/pad/api.h>
12#include <asm/arch/sci/svc/pm/api.h>
13#include <asm/arch/sci/svc/rm/api.h>
14#include <asm/arch/sci/rpc.h>
15#include <dt-bindings/soc/imx_rsrc.h>
16#include <linux/errno.h>
17
18static inline int sc_err_to_linux(sc_err_t err)
19{
20 int ret;
21
22 switch (err) {
23 case SC_ERR_NONE:
24 return 0;
25 case SC_ERR_VERSION:
26 case SC_ERR_CONFIG:
27 case SC_ERR_PARM:
28 ret = -EINVAL;
29 break;
30 case SC_ERR_NOACCESS:
31 case SC_ERR_LOCKED:
32 case SC_ERR_UNAVAILABLE:
33 ret = -EACCES;
34 break;
35 case SC_ERR_NOTFOUND:
36 case SC_ERR_NOPOWER:
37 ret = -ENODEV;
38 break;
39 case SC_ERR_IPC:
40 ret = -EIO;
41 break;
42 case SC_ERR_BUSY:
43 ret = -EBUSY;
44 break;
45 case SC_ERR_FAIL:
46 ret = -EIO;
47 break;
48 default:
49 ret = 0;
50 break;
51 }
52
53 debug("%s %d %d\n", __func__, err, ret);
54
55 return ret;
56}
57
Peng Fan55486382018-10-18 14:28:12 +020058/* PM API*/
59int sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
60 sc_pm_power_mode_t mode);
61int sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
62 sc_pm_clock_rate_t *rate);
63int sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
64 sc_pm_clock_rate_t *rate);
Peng Fan55486382018-10-18 14:28:12 +020065int sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
66 sc_bool_t enable, sc_bool_t autog);
67
68/* MISC API */
69int sc_misc_get_control(sc_ipc_t ipc, sc_rsrc_t resource, sc_ctrl_t ctrl,
70 u32 *val);
71void sc_misc_get_boot_dev(sc_ipc_t ipc, sc_rsrc_t *boot_dev);
72void sc_misc_boot_status(sc_ipc_t ipc, sc_misc_boot_status_t status);
73void sc_misc_build_info(sc_ipc_t ipc, u32 *build, u32 *commit);
74int sc_misc_otp_fuse_read(sc_ipc_t ipc, u32 word, u32 *val);
75
76/* RM API */
77sc_bool_t sc_rm_is_memreg_owned(sc_ipc_t ipc, sc_rm_mr_t mr);
78int sc_rm_get_memreg_info(sc_ipc_t ipc, sc_rm_mr_t mr, sc_faddr_t *addr_start,
79 sc_faddr_t *addr_end);
80sc_bool_t sc_rm_is_resource_owned(sc_ipc_t ipc, sc_rsrc_t resource);
81
82/* PAD API */
83int sc_pad_set(sc_ipc_t ipc, sc_pad_t pad, u32 val);
Peng Fan0c830d32018-10-18 14:28:07 +020084#endif