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git01.mediatek.com / filogic / uboot / e612f6803a6d9386f9b73b677ede15b658c0faab / . / arch / arm / dts / s5pc110-pinctrl.dtsi
blob: ea97ca6a92dbfbe15e39e024efd15772958a461e [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Simon Glass3e44c402014-10-20 19:48:34 -0600[diff] [blame]2/*
3 * U-Boot additions to enable a generic Exynos GPIO driver
4 *
5 * Copyright (c) 2014 Google, Inc
Simon Glass3e44c402014-10-20 19:48:34 -0600[diff] [blame]6 */
7
8/ {
9 pinctrl@e0200000 {
10 #address-cells = <1>;
Przemyslaw Marczak18248e32016-01-12 15:40:43 +0100[diff] [blame]11 #size-cells = <1>;
Simon Glass3e44c402014-10-20 19:48:34 -0600[diff] [blame]12 gpa0: gpa0 {
13 gpio-controller;
14 #gpio-cells = <2>;
15 };
16
17 gpa1: gpa1 {
18 gpio-controller;
19 #gpio-cells = <2>;
20 };
21
22 gpb: gpb {
23 gpio-controller;
24 #gpio-cells = <2>;
25 };
26
27 gpc0: gpc0 {
28 gpio-controller;
29 #gpio-cells = <2>;
30 };
31
32 gpc1: gpc1 {
33 gpio-controller;
34 #gpio-cells = <2>;
35 };
36
37 gpd0: gpd0 {
38 gpio-controller;
39 #gpio-cells = <2>;
40 };
41
42 gpd1: gpd1 {
43 gpio-controller;
44 #gpio-cells = <2>;
45 };
46
47 gpe0: gpe0 {
48 gpio-controller;
49 #gpio-cells = <2>;
50 };
51
52 gpe1: gpe1 {
53 gpio-controller;
54 #gpio-cells = <2>;
55 };
56
57 gpf0: gpf0 {
58 gpio-controller;
59 #gpio-cells = <2>;
60 };
61
62 gpf1: gpf1 {
63 gpio-controller;
64 #gpio-cells = <2>;
65 };
66
67 gpf2: gpf2 {
68 gpio-controller;
69 #gpio-cells = <2>;
70 };
71
72 gpf3: gpf3 {
73 gpio-controller;
74 #gpio-cells = <2>;
75 };
76
77 gpg0: gpg0 {
78 gpio-controller;
79 #gpio-cells = <2>;
80 };
81
82 gpg1: gpg1 {
83 gpio-controller;
84 #gpio-cells = <2>;
85 };
86
87 gpg2: gpg2 {
88 gpio-controller;
89 #gpio-cells = <2>;
90 };
91
92 gpg3: gpg3 {
93 gpio-controller;
94 #gpio-cells = <2>;
95 };
96
97 gpi: gpi {
98 gpio-controller;
99 #gpio-cells = <2>;
100 };
101
102 gpj0: gpj0 {
103 gpio-controller;
104 #gpio-cells = <2>;
105 };
106
107 gpj1: gpj1 {
108 gpio-controller;
109 #gpio-cells = <2>;
110 };
111
112 gpj2: gpj2 {
113 gpio-controller;
114 #gpio-cells = <2>;
115 };
116
117 gpj3: gpj3 {
118 gpio-controller;
119 #gpio-cells = <2>;
120 };
121
122 gpj4: gpj4 {
123 gpio-controller;
124 #gpio-cells = <2>;
125 };
126
127 gpmp01: gpmp01 {
128 gpio-controller;
129 #gpio-cells = <2>;
130 };
131
132 gpmp02: gpmp02 {
133 gpio-controller;
134 #gpio-cells = <2>;
135 };
136
137 gpmp03: gpmp03 {
138 gpio-controller;
139 #gpio-cells = <2>;
140 };
141
142 gpmp04: gpmp04 {
143 gpio-controller;
144 #gpio-cells = <2>;
145 };
146
147 gpmp05: gpmp05 {
148 gpio-controller;
149 #gpio-cells = <2>;
150 };
151
152 gpmp06: gpmp06 {
153 gpio-controller;
154 #gpio-cells = <2>;
155 };
156
157 gpmp07: gpmp07 {
158 gpio-controller;
159 #gpio-cells = <2>;
160 };
161
162 gpmp10: gpmp10 {
163 gpio-controller;
164 #gpio-cells = <2>;
165 };
166
167 gpmp11: gpmp11 {
168 gpio-controller;
169 #gpio-cells = <2>;
170 };
171
172 gpmp12: gpmp12 {
173 gpio-controller;
174 #gpio-cells = <2>;
175 };
176
177 gpmp13: gpmp13 {
178 gpio-controller;
179 #gpio-cells = <2>;
180 };
181
182 gpmp14: gpmp14 {
183 gpio-controller;
184 #gpio-cells = <2>;
185 };
186
187 gpmp15: gpmp15 {
188 gpio-controller;
189 #gpio-cells = <2>;
190 };
191
192 gpmp16: gpmp16 {
193 gpio-controller;
194 #gpio-cells = <2>;
195 };
196
197 gpmp17: gpmp17 {
198 gpio-controller;
199 #gpio-cells = <2>;
200 };
201
202 gpmp18: gpmp18 {
203 gpio-controller;
204 #gpio-cells = <2>;
205 };
206
207 gpmp20: gpmp20 {
208 gpio-controller;
209 #gpio-cells = <2>;
210 };
211
212 gpmp21: gpmp21 {
213 gpio-controller;
214 #gpio-cells = <2>;
215 };
216
217 gpmp22: gpmp22 {
218 gpio-controller;
219 #gpio-cells = <2>;
220 };
221
222 gpmp23: gpmp23 {
223 gpio-controller;
224 #gpio-cells = <2>;
225 };
226
227 gpmp24: gpmp24 {
228 gpio-controller;
229 #gpio-cells = <2>;
230 };
231
232 gpmp25: gpmp25 {
233 gpio-controller;
234 #gpio-cells = <2>;
235 };
236
237 gpmp26: gpmp26 {
238 gpio-controller;
239 #gpio-cells = <2>;
240 };
241
242 gpmp27: gpmp27 {
243 gpio-controller;
244 #gpio-cells = <2>;
245 };
246
247 gpmp28: gpmp28 {
248 gpio-controller;
249 #gpio-cells = <2>;
250 };
251
252 gph0: gph0 {
Przemyslaw Marczak18248e32016-01-12 15:40:43 +0100[diff] [blame]253 reg = <0xc00 0x20>;
Simon Glass3e44c402014-10-20 19:48:34 -0600[diff] [blame]254 gpio-controller;
255 #gpio-cells = <2>;
256 };
257
258 gph1: gph1 {
259 gpio-controller;
260 #gpio-cells = <2>;
261 };
262
263 gph2: gph2 {
264 gpio-controller;
265 #gpio-cells = <2>;
266 };
267
268 gph3: gph3 {
269 gpio-controller;
270 #gpio-cells = <2>;
271 };
272
273 };
274};