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Heiko Schocherf1084d62011-11-01 20:00:31 +00001/*
2 * Copyright (C) 2011
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23#ifndef _DV_SYSCFG_DEFS_H_
24#define _DV_SYSCFG_DEFS_H_
25
26#ifndef CONFIG_SOC_DA8XX
27/* System Control Module register structure for DM365 */
28struct dv_sys_module_regs {
29 unsigned int pinmux[5]; /* 0x00 */
30 unsigned int bootcfg; /* 0x14 */
31 unsigned int arm_intmux; /* 0x18 */
32 unsigned int edma_evtmux; /* 0x1C */
33 unsigned int ddr_slew; /* 0x20 */
34 unsigned int clkout; /* 0x24 */
35 unsigned int device_id; /* 0x28 */
36 unsigned int vdac_config; /* 0x2C */
37 unsigned int timer64_ctl; /* 0x30 */
38 unsigned int usbbphy_ctl; /* 0x34 */
39 unsigned int misc; /* 0x38 */
40 unsigned int mstpri[2]; /* 0x3C */
41 unsigned int vpss_clkctl; /* 0x44 */
42 unsigned int peri_clkctl; /* 0x48 */
43 unsigned int deepsleep; /* 0x4C */
44 unsigned int dft_enable; /* 0x50 */
45 unsigned int debounce[8]; /* 0x54 */
46 unsigned int vtpiocr; /* 0x74 */
47 unsigned int pupdctl0; /* 0x78 */
48 unsigned int pupdctl1; /* 0x7C */
49 unsigned int hdimcopbt; /* 0x80 */
50 unsigned int pll0_config; /* 0x84 */
51 unsigned int pll1_config; /* 0x88 */
52};
53
54#define VPTIO_RDY (1 << 15)
55#define VPTIO_IOPWRDN (1 << 14)
56#define VPTIO_CLRZ (1 << 13)
57#define VPTIO_LOCK (1 << 7)
58#define VPTIO_PWRDN (1 << 6)
59
60#define VPSS_CLK_CTL_VPSS_CLKMD (1 << 7)
61
62#define dv_sys_module_regs \
63 ((struct dv_sys_module_regs *)DAVINCI_SYSTEM_MODULE_BASE)
64
65#endif /* !CONFIG_SOC_DA8XX */
66#endif /* _DV_SYSCFG_DEFS_H_ */