blob: 6d6665005cf8844ce1be15ee1df8f2ddba1a2513 [file] [log] [blame]
Thomas Choufb798b12015-10-09 13:46:34 +08001menu "Timer Support"
2
3config TIMER
Bin Meng8a7b8642015-11-13 00:11:14 -08004 bool "Enable driver model for timer drivers"
Thomas Choufb798b12015-10-09 13:46:34 +08005 depends on DM
6 help
Bin Meng8a7b8642015-11-13 00:11:14 -08007 Enable driver model for timer access. It uses the same API as
8 lib/time.c, but now implemented by the uclass. The first timer
Thomas Choufb798b12015-10-09 13:46:34 +08009 will be used. The timer is usually a 32 bits free-running up
10 counter. There may be no real tick, and no timer interrupt.
11
Philipp Tomsich4fac4ea2017-07-28 17:38:42 +020012config SPL_TIMER
13 bool "Enable driver model for timer drivers in SPL"
14 depends on TIMER && SPL
15 help
16 Enable support for timer drivers in SPL. These can be used to get
17 a timer value when in SPL, or perhaps for implementing a delay
18 function. This enables the drivers in drivers/timer as part of an
19 SPL build.
20
21config TPL_TIMER
22 bool "Enable driver model for timer drivers in TPL"
23 depends on TIMER && TPL
24 help
25 Enable support for timer drivers in TPL. These can be used to get
26 a timer value when in TPL, or perhaps for implementing a delay
27 function. This enables the drivers in drivers/timer as part of an
28 TPL build.
29
Simon Glasse7ca7da2022-04-30 00:56:53 -060030config VPL_TIMER
31 bool "Enable driver model for timer drivers in VPL"
32 depends on TIMER && VPL
33 default y if TPL_TIMER
34 help
35 Enable support for timer drivers in VPL. These can be used to get
36 a timer value when in VPL, or perhaps for implementing a delay
37 function. This enables the drivers in drivers/timer as part of an
38 TPL build.
39
Simon Glass32f6c172016-02-24 09:14:49 -070040config TIMER_EARLY
41 bool "Allow timer to be used early in U-Boot"
42 depends on TIMER
Simon Glass6abd89b2018-09-02 17:02:24 -060043 # initr_bootstage() requires a timer and is called before initr_dm()
44 # so only the early timer is available
45 default y if X86 && BOOTSTAGE
Simon Glass32f6c172016-02-24 09:14:49 -070046 help
47 In some cases the timer must be accessible before driver model is
48 active. Examples include when using CONFIG_TRACE to trace U-Boot's
49 execution before driver model is set up. Enable this option to
50 use an early timer. These functions must be supported by your timer
51 driver: timer_early_get_count() and timer_early_get_rate().
52
Thomas Chou221d2ac2015-10-22 22:28:53 +080053config ALTERA_TIMER
Bin Meng8a7b8642015-11-13 00:11:14 -080054 bool "Altera timer support"
Thomas Chou221d2ac2015-10-22 22:28:53 +080055 depends on TIMER
56 help
Bin Meng8a7b8642015-11-13 00:11:14 -080057 Select this to enable a timer for Altera devices. Please find
Thomas Chou221d2ac2015-10-22 22:28:53 +080058 details on the "Embedded Peripherals IP User Guide" of Altera.
59
Sean Anderson5a238652020-10-25 21:46:57 -040060config ANDES_PLMT_TIMER
Sean Anderson5abf1f32020-10-25 21:46:56 -040061 bool
62 depends on RISCV_MMODE || SPL_RISCV_MMODE
63 help
64 The Andes PLMT block holds memory-mapped mtime register
65 associated with timer tick.
66
Bin Meng19f88b22018-10-10 22:07:02 -070067config ARC_TIMER
68 bool "ARC timer support"
69 depends on TIMER && ARC && CLK
70 help
71 Select this to enable built-in ARC timers.
72 ARC cores may have up to 2 built-in timers: timer0 and timer1,
73 usually at least one of them exists. Either of them is supported
74 in U-Boot.
75
Stefan Herbrechtsmeier10ff2882022-08-05 08:16:28 +020076config ARM_TWD_TIMER
77 bool "ARM timer watchdog (TWD) timer support"
78 depends on TIMER && CLK
79 help
80 Select this to enable support for the ARM global timer watchdog timer.
81
Bin Meng19f88b22018-10-10 22:07:02 -070082config AST_TIMER
83 bool "Aspeed ast2400/ast2500 timer support"
84 depends on TIMER
85 default y if ARCH_ASPEED
86 help
87 Select this to enable timer for Aspeed ast2400/ast2500 devices.
88 This is a simple sys timer driver, it is compatible with lib/time.c,
89 but does not support any interrupts. Even though SoC has 8 hardware
90 counters, they are all treated as a single device by this driver.
91 This is mostly because they all share several registers which
92 makes it difficult to completely separate them.
93
94config ATCPIT100_TIMER
95 bool "ATCPIT100 timer support"
96 depends on TIMER
97 help
98 Select this to enable a ATCPIT100 timer which will be embedded
99 in AE3XX, AE250 boards.
100
Wenyou.Yang@microchip.comce8a36f2017-08-15 17:40:26 +0800101config ATMEL_PIT_TIMER
102 bool "Atmel periodic interval timer support"
103 depends on TIMER
104 help
105 Select this to enable a periodic interval timer for Atmel devices,
106 it is designed to offer maximum accuracy and efficient management,
107 even for systems with long response time.
108
Eugen Hristev59d62892022-04-04 11:35:51 +0300109config SPL_ATMEL_PIT_TIMER
110 bool "Atmel periodic interval timer support in SPL"
111 depends on SPL_TIMER
112 help
113 Select this to enable a periodic interval timer for Atmel devices,
114 it is designed to offer maximum accuracy and efficient management,
115 even for systems with long response time.
116 Select this to be available in SPL.
117
Clément Léger7e5c11b2022-03-31 10:55:06 +0200118config ATMEL_TCB_TIMER
119 bool "Atmel timer counter support"
120 depends on TIMER
121 depends on ARCH_AT91
122 help
123 Select this to enable the use of the timer counter as a monotonic
124 counter.
125
Eugen Hristev118141e2022-04-04 11:35:50 +0300126config SPL_ATMEL_TCB_TIMER
127 bool "Atmel timer counter support in SPL"
128 depends on SPL_TIMER
129 depends on ARCH_AT91
130 help
131 Select this to enable the use of the timer counter as a monotonic
132 counter in SPL.
133
Michal Simekc3caac52018-04-17 13:40:46 +0200134config CADENCE_TTC_TIMER
135 bool "Cadence TTC (Triple Timer Counter)"
136 depends on TIMER
137 help
138 Enables support for the cadence ttc driver. This driver is present
139 on Xilinx Zynq and ZynqMP SoCs.
140
Marek Vasut442c0f12018-08-18 15:58:32 +0200141config DESIGNWARE_APB_TIMER
142 bool "Designware APB Timer"
143 depends on TIMER
144 help
145 Enables support for the Designware APB Timer driver. This timer is
146 present on Altera SoCFPGA SoCs.
147
Nick Hawkins3cd8cfb2022-06-08 16:21:35 -0500148config GXP_TIMER
149 bool "HPE GXP Timer"
150 depends on TIMER
151 help
152 Enables support for the GXP Timer driver. This timer is
153 present on HPE GXP SoCs.
154
Bin Meng19f88b22018-10-10 22:07:02 -0700155config MPC83XX_TIMER
156 bool "MPC83xx timer support"
157 depends on TIMER
Bin Mengb2aa4c52015-11-13 00:11:24 -0800158 help
Bin Meng19f88b22018-10-10 22:07:02 -0700159 Select this to enable support for the timer found on
160 devices based on the MPC83xx family of SoCs.
Bin Mengb2aa4c52015-11-13 00:11:24 -0800161
Marek Vasut6be61c62019-05-04 17:30:58 +0200162config RENESAS_OSTM_TIMER
163 bool "Renesas RZ/A1 R7S72100 OSTM Timer"
164 depends on TIMER
165 help
166 Enables support for the Renesas OSTM Timer driver.
167 This timer is present on Renesas RZ/A1 R7S72100 SoCs.
168
Bin Meng917d2b82021-07-28 12:00:22 +0800169config X86_TSC_TIMER_FREQ
170 int "x86 TSC timer frequency in Hz"
Bin Meng855e6572018-10-13 20:52:10 -0700171 depends on X86_TSC_TIMER
Bin Meng917d2b82021-07-28 12:00:22 +0800172 default 1000000000
Bin Meng855e6572018-10-13 20:52:10 -0700173 help
Bin Meng917d2b82021-07-28 12:00:22 +0800174 Sets the estimated CPU frequency in Hz when TSC is used as the
Bin Meng855e6572018-10-13 20:52:10 -0700175 early timer and the frequency can neither be calibrated via some
176 hardware ways, nor got from device tree at the time when device
177 tree is not available yet.
178
Stephan Gerhold7b0c1c52020-01-04 18:45:15 +0100179config NOMADIK_MTU_TIMER
180 bool "Nomadik MTU Timer"
181 depends on TIMER
182 help
183 Enables support for the Nomadik Multi Timer Unit (MTU),
184 used in ST-Ericsson Ux500 SoCs.
185 The MTU provides 4 decrementing free-running timers.
186 At the moment, only the first timer is used by the driver.
187
Jim Liu5cb640a2022-04-19 13:32:22 +0800188config NPCM_TIMER
189 bool "Nuvoton NPCM timer support"
190 depends on TIMER
191 help
192 Select this to enable a timer on Nuvoton NPCM SoCs.
193 NPCM timer module has 5 down-counting timers, only the first timer
194 is used to implement timer ops. No support for early timer and
195 boot timer.
196
Mugunthan V Nafae3702015-12-24 16:08:07 +0530197config OMAP_TIMER
198 bool "Omap timer support"
199 depends on TIMER
200 help
201 Select this to enable an timer for Omap devices.
202
Michael Wallef874e092022-08-17 21:37:51 +0200203config ORION_TIMER
204 bool "Orion timer support"
205 depends on TIMER
Stefan Roese70280f22022-09-15 16:20:37 +0200206 default y if ARCH_KIRKWOOD || (ARCH_MVEBU && ARMADA_32BIT)
207 select TIMER_EARLY if ARCH_MVEBU
Michael Wallef874e092022-08-17 21:37:51 +0200208 help
Stefan Roese70280f22022-09-15 16:20:37 +0200209 Select this to enable an timer for Orion and Armada devices
210 like Armada XP etc.
Michael Wallef874e092022-08-17 21:37:51 +0200211
Bin Meng25399032018-12-12 06:12:27 -0800212config RISCV_TIMER
213 bool "RISC-V timer support"
214 depends on TIMER && RISCV
215 help
Sean Anderson9baaaef2020-09-28 10:52:21 -0400216 Select this to enable support for a generic RISC-V S-Mode timer
217 driver.
Bin Meng25399032018-12-12 06:12:27 -0800218
Bin Meng19f88b22018-10-10 22:07:02 -0700219config ROCKCHIP_TIMER
220 bool "Rockchip timer support"
maxims@google.comf57bd002017-01-18 13:44:55 -0800221 depends on TIMER
maxims@google.comf57bd002017-01-18 13:44:55 -0800222 help
Bin Meng19f88b22018-10-10 22:07:02 -0700223 Select this to enable support for the timer found on
224 Rockchip devices.
225
226config SANDBOX_TIMER
227 bool "Sandbox timer support"
228 depends on SANDBOX && TIMER
229 help
230 Select this to enable an emulated timer for sandbox. It gets
231 time from host os.
maxims@google.comf57bd002017-01-18 13:44:55 -0800232
William Zhang38c26de2022-08-23 21:44:32 -0700233config ARM_GLOBAL_TIMER
234 bool "ARM Cortex A9 global timer support"
Patrice Chotard200a7992017-02-21 13:37:05 +0100235 depends on TIMER
William Zhang38c26de2022-08-23 21:44:32 -0700236 depends on ARM
Patrice Chotard200a7992017-02-21 13:37:05 +0100237 default y if ARCH_STI
238 help
William Zhang38c26de2022-08-23 21:44:32 -0700239 Select this to enable global timer found on ARM Cortex A9
240 based devices.
Patrice Chotard200a7992017-02-21 13:37:05 +0100241
Andre Przywara31ab0fd2022-10-20 23:10:23 +0100242config SP804_TIMER
243 bool "ARM SP804 timer support"
244 depends on TIMER
245 help
246 ARM SP804 dual timer IP support
247
Patrice Chotardfdfefdc2018-02-07 10:44:45 +0100248config STM32_TIMER
Bin Meng19f88b22018-10-10 22:07:02 -0700249 bool "STM32 timer support"
Patrice Chotardfdfefdc2018-02-07 10:44:45 +0100250 depends on TIMER
251 help
252 Select this to enable support for the timer found on
253 STM32 devices.
254
Bin Meng19f88b22018-10-10 22:07:02 -0700255config X86_TSC_TIMER
256 bool "x86 Time-Stamp Counter (TSC) timer support"
257 depends on TIMER && X86
Mario Six3c516552018-08-06 10:23:38 +0200258 help
Bin Meng19f88b22018-10-10 22:07:02 -0700259 Select this to enable Time-Stamp Counter (TSC) timer for x86.
Mario Six3c516552018-08-06 10:23:38 +0200260
Simon Glassd3edd422019-12-06 21:41:49 -0700261config X86_TSC_READ_BASE
262 bool "Read the TSC timer base on start-up"
263 depends on X86_TSC_TIMER
264 help
265 On x86 platforms the TSC timer tick starts at the value 0 on reset.
266 This it makes no sense to read the timer on boot and use that as the
267 base, since we will miss some time taken to load U-Boot, etc. This
268 delay is controlled by the SoC and we cannot reduce it, but for
269 bootstage we want to record the time since reset as accurately as
270 possible.
271
272 The only exception is when U-Boot is used as a secondary bootloader,
273 where this option should be enabled.
274
Simon Glassbba203e2019-12-06 21:41:50 -0700275config TPL_X86_TSC_TIMER_NATIVE
276 bool "x86 TSC timer uses native calibration"
277 depends on TPL && X86_TSC_TIMER
278 help
279 Selects native timer calibration for TPL and don't include the other
280 methods in the code. This helps to reduce code size in TPL and works
281 on fairly modern Intel chips. Code-size reductions is about 700
282 bytes.
283
developer4a347352018-11-15 10:07:56 +0800284config MTK_TIMER
285 bool "MediaTek timer support"
286 depends on TIMER
287 help
288 Select this to enable support for the timer found on
289 MediaTek devices.
290
Claudiu Beznea5669c3d2020-09-07 18:36:33 +0300291config MCHP_PIT64B_TIMER
292 bool "Microchip 64-bit periodic interval timer support"
293 depends on TIMER
294 help
295 Select this to enable support for Microchip 64-bit periodic
296 interval timer.
297
Giulio Benetti9aed42b2021-05-13 12:18:31 +0200298config IMX_GPT_TIMER
299 bool "NXP i.MX GPT timer support"
300 depends on TIMER
301 help
302 Select this to enable support for the timer found on
303 NXP i.MX devices.
304
Michal Simeke8e52772022-06-24 14:16:32 +0200305config XILINX_TIMER
306 bool "Xilinx timer support"
307 depends on TIMER
308 select REGMAP
Michal Simek8d2bea42022-06-23 13:08:30 +0200309 select SPL_REGMAP if SPL
Michal Simeke8e52772022-06-24 14:16:32 +0200310 help
311 Select this to enable support for the timer found on
312 any Xilinx boards (axi timer).
313
Thomas Choufb798b12015-10-09 13:46:34 +0800314endmenu