Marek Vasut | 0b16ba5 | 2022-04-12 17:26:01 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright 2022 Marek Vasut <marex@denx.de> |
| 4 | */ |
| 5 | |
| 6 | #ifndef __IMX8MM_DATA_MODUL_EDM_SBC_H |
| 7 | #define __IMX8MM_DATA_MODUL_EDM_SBC_H |
| 8 | |
| 9 | #include <linux/sizes.h> |
| 10 | #include <linux/stringify.h> |
| 11 | #include <asm/arch/imx-regs.h> |
| 12 | |
| 13 | #define CONFIG_SYS_BOOTM_LEN SZ_128M |
| 14 | |
| 15 | #define CONFIG_SPL_MAX_SIZE (148 * 1024) |
| 16 | #define CONFIG_SYS_MONITOR_LEN SZ_1M |
| 17 | |
| 18 | #define CONFIG_SPL_STACK 0x920000 |
| 19 | #ifdef CONFIG_SPL_BUILD |
| 20 | #define CONFIG_SPL_BSS_START_ADDR 0x910000 |
| 21 | #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 kiB */ |
| 22 | #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 |
| 23 | #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M /* 16 MiB */ |
| 24 | |
| 25 | #define CONFIG_MALLOC_F_ADDR 0x930000 |
| 26 | |
| 27 | /* For RAW image gives a error info not panic */ |
| 28 | #define CONFIG_SPL_ABORT_ON_RAW_IMAGE |
| 29 | |
| 30 | #endif |
| 31 | |
| 32 | /* Link Definitions */ |
| 33 | #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 |
| 34 | #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 |
| 35 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 36 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 37 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 38 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 39 | |
| 40 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
| 41 | #define PHYS_SDRAM 0x40000000 |
| 42 | #define PHYS_SDRAM_SIZE 0x40000000 /* Minimum 1 GiB DDR */ |
| 43 | |
| 44 | #define CONFIG_MXC_UART_BASE UART3_BASE_ADDR |
| 45 | |
| 46 | /* Monitor Command Prompt */ |
| 47 | #define CONFIG_SYS_CBSIZE 2048 |
| 48 | #define CONFIG_SYS_MAXARGS 64 |
| 49 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| 50 | #define CONFIG_SYS_PBSIZE \ |
| 51 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
| 52 | |
| 53 | /* PHY needs a longer autonegotiation timeout after reset */ |
| 54 | #define PHY_ANEG_TIMEOUT 20000 |
| 55 | #define FEC_QUIRK_ENET_MAC |
| 56 | |
| 57 | /* USDHC */ |
| 58 | #define CONFIG_SYS_FSL_USDHC_NUM 2 |
| 59 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
| 60 | |
| 61 | #if !defined(CONFIG_SPL_BUILD) |
| 62 | |
| 63 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 64 | "altbootcmd=setenv devpart 2 && run bootcmd ; reset\0" \ |
| 65 | "bootlimit=3\0" \ |
| 66 | "devtype=mmc\0" \ |
| 67 | "devpart=1\0" \ |
| 68 | /* Give slow devices beyond USB HUB chance to come up. */ \ |
| 69 | "usb_pgood_delay=2000\0" \ |
| 70 | "dfu_alt_info=" \ |
| 71 | /* RAM block at DRAM offset 256..768 MiB */ \ |
| 72 | "ram ram0=ram ram 0x50000000 0x20000000&" \ |
| 73 | /* 16 MiB SPI NOR */ \ |
| 74 | "mtd nor0=sf raw 0x0 0x1000000\0" \ |
| 75 | "dmo_preboot=" \ |
| 76 | "sf probe ; " /* Scan for SPI NOR, needed by DFU */ \ |
| 77 | "run dmo_usb_start_hub ; " \ |
| 78 | /* Attempt to start USB and Network console */ \ |
| 79 | "run dmo_usb_cdc_acm_start ; " \ |
| 80 | "run dmo_netconsole_start\0" \ |
| 81 | "dmo_update_env=" \ |
| 82 | "setenv dmo_update_env true ; saveenv ; saveenv\0" \ |
| 83 | "dmo_usb_cdc_acm_start=" \ |
| 84 | "if test \"${dmo_usb_cdc_acm_enabled}\" = \"true\" ; then "\ |
| 85 | /* Ungate IMX8MM_CLK_USB1_CTRL_ROOT */ \ |
| 86 | "mw 0x303844d0 3 ; " \ |
| 87 | /* Read USBNC_n_PHY_STATUS BIT(4) VBUS_VLD */ \ |
| 88 | "setexpr.l usbnc_n_phy_status *0x32e4023c \\\\& 0x8 ; " \ |
| 89 | /* If USB OTG has valid VBUS, enable CDC ACM */ \ |
| 90 | "if test \"${usbnc_n_phy_status}\" -eq 8 ; then "\ |
| 91 | "usb start && " \ |
| 92 | "setenv stderr ${stderr},usbacm && " \ |
| 93 | "setenv stdout ${stdout},usbacm && " \ |
| 94 | "setenv stdin ${stdin},usbacm ; " \ |
| 95 | "fi ; " \ |
| 96 | "fi\0" \ |
| 97 | "dmo_usb_start_hub=" \ |
| 98 | "i2c dev 1 ; " \ |
| 99 | /* Reset the USB USB */ \ |
| 100 | "gpio clear GPIO5_2 ; sleep 0.01 ; " /* t1 > 1us */ \ |
| 101 | "gpio set GPIO5_2 ; sleep 0.01 ; " /* t5 > 3us */ \ |
| 102 | /* Write chunks of descriptor into the USB HUB */ \ |
| 103 | "mw.l 0x7e1000 0x14042417 ; mw.l 0x7e1004 0x9b0bb325 ; "\ |
| 104 | "mw.l 0x7e1008 0x00000220 ; mw.l 0x7e100c 0x01320100 ; "\ |
| 105 | "mw.l 0x7e1010 0x00003232 ; mw.l 0x7e1014 0x4d000909 ; "\ |
| 106 | "i2c write 0x7e1000 0x2c 0x00 0x18 -s ; " \ |
| 107 | "mw.l 0x7e1000 0x6300690f ; mw.l 0x7e1004 0x6f007200 ; "\ |
| 108 | "mw.l 0x7e1008 0x68006300 ; mw.l 0x7e100c 0x70006900 ; "\ |
| 109 | "i2c write 0x7e1000 0x2c 0x18 0x10 -s ; " \ |
| 110 | "mw.l 0x7e1000 0x53005511 ; mw.l 0x7e1004 0x32004200 ; "\ |
| 111 | "mw.l 0x7e1008 0x31003500 ; mw.l 0x7e100c 0x42003400 ; "\ |
| 112 | "mw.l 0x7e1010 0x00006900 ; " \ |
| 113 | "i2c write 0x7e1000 0x2c 0x54 0x12 -s ; " \ |
| 114 | "mw.l 0x7e1000 0x00000101 ; " \ |
| 115 | "i2c write 0x7e1000 0x2c 0xff 0x2 -s\0" \ |
| 116 | "dmo_netconsole_start=" \ |
| 117 | "if test \"${dmo_netconsole_enabled}\" = \"true\" ; then "\ |
| 118 | "setenv autoload false && " \ |
| 119 | "dhcp && " \ |
| 120 | "setenv autoload && " \ |
| 121 | "setenv ncip ${serverip} && " \ |
| 122 | "setenv stderr ${stderr},nc && " \ |
| 123 | "setenv stdout ${stdout},nc && " \ |
| 124 | "setenv stdin ${stdin},nc ; " \ |
| 125 | "fi" |
| 126 | |
| 127 | #endif |
| 128 | |
| 129 | #endif |