Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 1 | /* |
| 2 | * RTC Masks |
| 3 | */ |
| 4 | |
| 5 | #ifndef __BFIN_PERIPHERAL_RTC__ |
| 6 | #define __BFIN_PERIPHERAL_RTC__ |
| 7 | |
| 8 | /* RTC_STAT and RTC_ALARM Masks */ |
| 9 | #define RTC_SEC 0x0000003F /* Real-Time Clock Seconds */ |
| 10 | #define RTC_MIN 0x00000FC0 /* Real-Time Clock Minutes */ |
| 11 | #define RTC_HR 0x0001F000 /* Real-Time Clock Hours */ |
| 12 | #define RTC_DAY 0xFFFE0000 /* Real-Time Clock Days */ |
| 13 | |
| 14 | #define RTC_SEC_P 0 |
| 15 | #define RTC_MIN_P 6 |
| 16 | #define RTC_HR_P 12 |
| 17 | #define RTC_DAY_P 17 |
| 18 | |
| 19 | /* |
| 20 | * RTC_ALARM Macro |
| 21 | */ |
| 22 | #define SET_ALARM(day, hr, min, sec) \ |
| 23 | ( (((day) << RTC_DAY_P) & RTC_DAY) | \ |
| 24 | (((hr) << RTC_HR_P ) & RTC_HR ) | \ |
| 25 | (((min) << RTC_MIN_P) & RTC_MIN) | \ |
| 26 | (((sec) << RTC_SEC_P) & RTC_SEC) ) |
| 27 | |
| 28 | /* RTC_ICTL and RTC_ISTAT Masks */ |
| 29 | #define STOPWATCH 0x0001 /* Stopwatch Interrupt Enable */ |
| 30 | #define ALARM 0x0002 /* Alarm Interrupt Enable */ |
| 31 | #define SECOND 0x0004 /* Seconds (1 Hz) Interrupt Enable */ |
| 32 | #define MINUTE 0x0008 /* Minutes Interrupt Enable */ |
| 33 | #define HOUR 0x0010 /* Hours Interrupt Enable */ |
| 34 | #define DAY 0x0020 /* 24 Hours (Days) Interrupt Enable */ |
| 35 | #define DAY_ALARM 0x0040 /* Day Alarm (Day, Hour, Minute, Second) Interrupt Enable */ |
| 36 | #define WRITE_PENDING 0x4000 /* Write Pending Status */ |
| 37 | #define WRITE_COMPLETE 0x8000 /* Write Complete Interrupt Enable */ |
| 38 | |
| 39 | /* RTC_FAST / RTC_PREN Mask */ |
| 40 | #define PREN 0x0001 /* Enable Prescaler, RTC Runs @1 Hz */ |
| 41 | |
| 42 | #endif |