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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001
3 * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
4 * Based on code by:
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00008 */
9
10#include <common.h>
Stefan Roese247e9d72010-09-09 19:18:00 +020011#include <asm/ppc4xx.h>
wdenkc6097192002-11-03 00:24:07 +000012#include <asm/processor.h>
13
14#include <watchdog.h>
15
Wolfgang Denkce3c2182011-12-07 12:19:25 +000016/* info for FLASH chips */
17flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
wdenkc6097192002-11-03 00:24:07 +000018
Wolfgang Denkce3c2182011-12-07 12:19:25 +000019/*
wdenkc6097192002-11-03 00:24:07 +000020 * Functions
21 */
Wolfgang Denkce3c2182011-12-07 12:19:25 +000022static ulong flash_get_size(vu_long *addr, flash_info_t *info);
wdenkc6097192002-11-03 00:24:07 +000023static int write_word8(flash_info_t *info, ulong dest, ulong data);
Wolfgang Denkce3c2182011-12-07 12:19:25 +000024static int write_word32(flash_info_t *info, ulong dest, ulong data);
25static void flash_get_offsets(ulong base, flash_info_t *info);
wdenkc6097192002-11-03 00:24:07 +000026
Wolfgang Denkce3c2182011-12-07 12:19:25 +000027unsigned long flash_init(void)
wdenkc6097192002-11-03 00:24:07 +000028{
Wolfgang Denkce3c2182011-12-07 12:19:25 +000029 int i;
30 unsigned long size_b0, base_b0;
Wolfgang Denkfe57a282011-12-07 12:19:26 +000031 unsigned long size_b1;
wdenkc6097192002-11-03 00:24:07 +000032
Wolfgang Denkce3c2182011-12-07 12:19:25 +000033 /* Init: no FLASHes known */
34 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i)
35 flash_info[i].flash_id = FLASH_UNKNOWN;
wdenkc6097192002-11-03 00:24:07 +000036
Wolfgang Denkce3c2182011-12-07 12:19:25 +000037 /* Get Size of Boot and Main Flashes */
38 size_b0 = flash_get_size((vu_long *) FLASH_BASE0_PRELIM,
39 &flash_info[0]);
40 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
41 printf("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
42 size_b0, size_b0 << 20);
43 return 0;
44 }
45 size_b1 =
46 flash_get_size((vu_long *) FLASH_BASE1_PRELIM,
47 &flash_info[1]);
48 if (flash_info[1].flash_id == FLASH_UNKNOWN) {
49 printf("## Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n",
50 size_b1, size_b1 << 20);
51 return 0;
52 }
wdenkc6097192002-11-03 00:24:07 +000053
Wolfgang Denkce3c2182011-12-07 12:19:25 +000054 /* Calculate base addresses */
55 base_b0 = -size_b0;
wdenkc6097192002-11-03 00:24:07 +000056
Wolfgang Denkce3c2182011-12-07 12:19:25 +000057 /* Setup offsets for Boot Flash */
58 flash_get_offsets(base_b0, &flash_info[0]);
wdenkc6097192002-11-03 00:24:07 +000059
Wolfgang Denkce3c2182011-12-07 12:19:25 +000060 /* Protect board level data */
61 (void) flash_protect(FLAG_PROTECT_SET,
62 base_b0,
63 flash_info[0].start[1] - 1, &flash_info[0]);
wdenkc6097192002-11-03 00:24:07 +000064
Wolfgang Denkce3c2182011-12-07 12:19:25 +000065 /* Monitor protection ON by default */
66 (void) flash_protect(FLAG_PROTECT_SET,
67 base_b0 + size_b0 - monitor_flash_len,
68 base_b0 + size_b0 - 1, &flash_info[0]);
wdenkc6097192002-11-03 00:24:07 +000069
Wolfgang Denkce3c2182011-12-07 12:19:25 +000070 /* Protect the FPGA image */
71 (void) flash_protect(FLAG_PROTECT_SET,
72 FLASH_BASE1_PRELIM,
73 FLASH_BASE1_PRELIM + CONFIG_SYS_FPGA_IMAGE_LEN -
74 1, &flash_info[1]);
wdenkc6097192002-11-03 00:24:07 +000075
Wolfgang Denkce3c2182011-12-07 12:19:25 +000076 /* Protect the default boot image */
77 (void) flash_protect(FLAG_PROTECT_SET,
78 FLASH_BASE1_PRELIM + CONFIG_SYS_FPGA_IMAGE_LEN,
79 FLASH_BASE1_PRELIM + CONFIG_SYS_FPGA_IMAGE_LEN +
80 0x600000 - 1, &flash_info[1]);
wdenkc6097192002-11-03 00:24:07 +000081
Wolfgang Denkce3c2182011-12-07 12:19:25 +000082 /* Setup offsets for Main Flash */
83 flash_get_offsets(FLASH_BASE1_PRELIM, &flash_info[1]);
wdenkc6097192002-11-03 00:24:07 +000084
Wolfgang Denkce3c2182011-12-07 12:19:25 +000085 return size_b0 + size_b1;
86}
wdenkc6097192002-11-03 00:24:07 +000087
Wolfgang Denkce3c2182011-12-07 12:19:25 +000088static void flash_get_offsets(ulong base, flash_info_t *info)
wdenkc6097192002-11-03 00:24:07 +000089{
Wolfgang Denkce3c2182011-12-07 12:19:25 +000090 int i;
wdenkc6097192002-11-03 00:24:07 +000091
Wolfgang Denkce3c2182011-12-07 12:19:25 +000092 /* set up sector start address table - FOR BOOT ROM ONLY!!! */
93 if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
94 for (i = 0; i < info->sector_count; i++)
95 info->start[i] = base + (i * 0x00010000);
96 }
97} /* end flash_get_offsets() */
wdenkc6097192002-11-03 00:24:07 +000098
Wolfgang Denkce3c2182011-12-07 12:19:25 +000099void flash_print_info(flash_info_t *info)
wdenkc6097192002-11-03 00:24:07 +0000100{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000101 int i;
102 int k;
103 int size;
104 int erased;
105 volatile unsigned long *flash;
wdenkc6097192002-11-03 00:24:07 +0000106
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000107 if (info->flash_id == FLASH_UNKNOWN) {
108 printf("missing or unknown FLASH type\n");
109 return;
110 }
wdenkc6097192002-11-03 00:24:07 +0000111
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000112 switch (info->flash_id & FLASH_VENDMASK) {
113 case FLASH_MAN_AMD:
114 printf("1 x AMD ");
115 break;
116 case FLASH_MAN_STM:
117 printf("1 x STM ");
118 break;
119 case FLASH_MAN_INTEL:
120 printf("2 x Intel ");
121 break;
122 default:
123 printf("Unknown Vendor ");
124 }
wdenkc6097192002-11-03 00:24:07 +0000125
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000126 switch (info->flash_id & FLASH_TYPEMASK) {
wdenk57b2d802003-06-27 21:31:46 +0000127 case FLASH_AM040:
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000128 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
129 printf("AM29LV040 (4096 Kbit, uniform sector size)\n");
130 else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_STM)
131 printf("M29W040B (4096 Kbit, uniform block size)\n");
132 else
133 printf("UNKNOWN 29x040x (4096 Kbit, uniform sector size)\n");
134 break;
wdenk57b2d802003-06-27 21:31:46 +0000135 case FLASH_28F320J3A:
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000136 printf("28F320J3A (32 Mbit = 128K x 32)\n");
137 break;
wdenk57b2d802003-06-27 21:31:46 +0000138 case FLASH_28F640J3A:
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000139 printf("28F640J3A (64 Mbit = 128K x 64)\n");
140 break;
wdenk57b2d802003-06-27 21:31:46 +0000141 case FLASH_28F128J3A:
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000142 printf("28F128J3A (128 Mbit = 128K x 128)\n");
143 break;
wdenk57b2d802003-06-27 21:31:46 +0000144 default:
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000145 printf("Unknown Chip Type\n");
146 }
wdenkc6097192002-11-03 00:24:07 +0000147
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000148 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_STM) {
149 printf(" Size: %ld KB in %d Blocks\n",
150 info->size >> 10, info->sector_count);
151 } else {
152 printf(" Size: %ld KB in %d Sectors\n",
153 info->size >> 10, info->sector_count);
wdenk57b2d802003-06-27 21:31:46 +0000154 }
wdenkc6097192002-11-03 00:24:07 +0000155
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000156 printf(" Sector Start Addresses:");
157 for (i = 0; i < info->sector_count; ++i) {
158 /*
159 * Check if whole sector is erased
160 */
161 if (i != (info->sector_count - 1))
162 size = info->start[i + 1] - info->start[i];
163 else
164 size = info->start[0] + info->size - info->start[i];
165 erased = 1;
166 flash = (volatile unsigned long *) info->start[i];
167 size = size >> 2; /* divide by 4 for longword access */
168 for (k = 0; k < size; k++) {
169 if (*flash++ != 0xffffffff) {
170 erased = 0;
171 break;
172 }
173 }
174
175 if ((i % 5) == 0)
176 printf("\n ");
177 printf(" %08lX%s%s",
178 info->start[i],
179 erased ? " E" : " ",
180 info->protect[i] ? "RO " : " ");
181 }
182 printf("\n");
183} /* end flash_print_info() */
wdenkc6097192002-11-03 00:24:07 +0000184
185/*
186 * The following code cannot be run from FLASH!
187 */
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000188static ulong flash_get_size(vu_long *addr, flash_info_t *info)
wdenkc6097192002-11-03 00:24:07 +0000189{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000190 short i;
191 ulong base = (ulong) addr;
wdenkc6097192002-11-03 00:24:07 +0000192
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000193 /* Setup default type */
194 info->flash_id = FLASH_UNKNOWN;
195 info->sector_count = 0;
196 info->size = 0;
wdenkc6097192002-11-03 00:24:07 +0000197
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000198 /* Test for Boot Flash */
199 if (base == FLASH_BASE0_PRELIM) {
200 unsigned char value;
201 volatile unsigned char *addr2 = (unsigned char *) addr;
wdenkc6097192002-11-03 00:24:07 +0000202
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000203 /* Write auto select command: read Manufacturer ID */
204 *(addr2 + 0x555) = 0xaa;
205 *(addr2 + 0x2aa) = 0x55;
206 *(addr2 + 0x555) = 0x90;
wdenkc6097192002-11-03 00:24:07 +0000207
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000208 /* Manufacture ID */
209 value = *addr2;
210 switch (value) {
211 case (unsigned char) AMD_MANUFACT:
212 info->flash_id = FLASH_MAN_AMD;
213 break;
214 case (unsigned char) STM_MANUFACT:
215 info->flash_id = FLASH_MAN_STM;
216 break;
217 default:
218 *addr2 = 0xf0; /* no or unknown flash */
219 return 0;
220 }
wdenkc6097192002-11-03 00:24:07 +0000221
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000222 /* Device ID */
223 value = *(addr2 + 1);
224 switch (value) {
225 case (unsigned char) AMD_ID_LV040B:
226 case (unsigned char) STM_ID_29W040B:
227 info->flash_id += FLASH_AM040;
228 info->sector_count = 8;
229 info->size = 0x00080000;
230 break; /* => 512Kb */
231 default:
232 *addr2 = 0xf0; /* => no or unknown flash */
233 return 0;
234 }
235 } else { /* MAIN Flash */
236 unsigned long value;
237 volatile unsigned long *addr2 = (unsigned long *) addr;
wdenkc6097192002-11-03 00:24:07 +0000238
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000239 /* Write auto select command: read Manufacturer ID */
240 *addr2 = 0x90909090;
wdenkc6097192002-11-03 00:24:07 +0000241
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000242 /* Manufacture ID */
243 value = *addr2;
244 switch (value) {
245 case (unsigned long) INTEL_MANUFACT:
246 info->flash_id = FLASH_MAN_INTEL;
247 break;
248 default:
249 *addr2 = 0xff; /* no or unknown flash */
250 return 0;
251 }
wdenkc6097192002-11-03 00:24:07 +0000252
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000253 /* Device ID - This shit is interleaved... */
254 value = *(addr2 + 1);
255 switch (value) {
256 case (unsigned long) INTEL_ID_28F320J3A:
257 info->flash_id += FLASH_28F320J3A;
258 info->sector_count = 32;
259 info->size = 0x00400000 * 2;
260 break; /* => 2 X 4 MB */
261 case (unsigned long) INTEL_ID_28F640J3A:
262 info->flash_id += FLASH_28F640J3A;
263 info->sector_count = 64;
264 info->size = 0x00800000 * 2;
265 break; /* => 2 X 8 MB */
266 case (unsigned long) INTEL_ID_28F128J3A:
267 info->flash_id += FLASH_28F128J3A;
268 info->sector_count = 128;
269 info->size = 0x01000000 * 2;
270 break; /* => 2 X 16 MB */
271 default:
272 *addr2 = 0xff; /* => no or unknown flash */
273 }
wdenk57b2d802003-06-27 21:31:46 +0000274 }
wdenkc6097192002-11-03 00:24:07 +0000275
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000276 /* Make sure we don't exceed CONFIG_SYS_MAX_FLASH_SECT */
277 if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
278 printf("** ERROR: sector count %d > max (%d) **\n",
279 info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
280 info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
281 }
wdenkc6097192002-11-03 00:24:07 +0000282
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000283 /* set up sector start address table */
284 switch (info->flash_id & FLASH_TYPEMASK) {
wdenk57b2d802003-06-27 21:31:46 +0000285 case FLASH_AM040:
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000286 for (i = 0; i < info->sector_count; i++)
287 info->start[i] = base + (i * 0x00010000);
288 break;
wdenk57b2d802003-06-27 21:31:46 +0000289 case FLASH_28F320J3A:
290 case FLASH_28F640J3A:
291 case FLASH_28F128J3A:
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000292 for (i = 0; i < info->sector_count; i++)
293 info->start[i] = base +
294 (i * 0x00020000 * 2); /* 2 Banks */
295 break;
wdenk57b2d802003-06-27 21:31:46 +0000296 }
wdenkc6097192002-11-03 00:24:07 +0000297
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000298 /* Test for Boot Flash */
299 if (base == FLASH_BASE0_PRELIM) {
300 volatile unsigned char *addr2;
wdenkc6097192002-11-03 00:24:07 +0000301
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000302 /* check for protected sectors */
303 for (i = 0; i < info->sector_count; i++) {
304 /*
305 * read sector protection at sector address,
306 * (AX .. A0) = 0x02
307 * D0 = 1 if protected
308 */
309 addr2 = (volatile unsigned char *) (info->start[i]);
310 info->protect[i] = *(addr2 + 2) & 1;
311 }
wdenkc6097192002-11-03 00:24:07 +0000312
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000313 /* Restore read mode */
314 *(unsigned char *) base = 0xF0; /* Reset NORMAL Flash */
315 } else { /* Main Flash */
316 volatile unsigned long *addr2;
wdenkc6097192002-11-03 00:24:07 +0000317
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000318 /* check for protected sectors */
319 for (i = 0; i < info->sector_count; i++) {
320 /*
321 * read sector protection at sector address,
322 * (AX .. A0) = 0x02
323 * D0 = 1 if protected
324 */
325 addr2 = (volatile unsigned long *) (info->start[i]);
326 info->protect[i] = *(addr2 + 2) & 0x1;
327 }
328
329 /* Restore read mode */
330 *(unsigned long *) base = 0xFFFFFFFF; /* Reset Flash */
331 }
332
333 return info->size;
334} /* end flash_get_size() */
wdenkc6097192002-11-03 00:24:07 +0000335
336static int wait_for_DQ7(ulong addr, uchar cmp_val, ulong tout)
337{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000338 int i;
wdenkc6097192002-11-03 00:24:07 +0000339
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000340 volatile uchar *vaddr = (uchar *) addr;
wdenkc6097192002-11-03 00:24:07 +0000341
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000342 /* Loop X times */
343 for (i = 1; i <= (100 * tout); i++) { /* Wait up to tout ms */
344 udelay(10);
345 /* Pause 10 us */
wdenkc6097192002-11-03 00:24:07 +0000346
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000347 /* Check for completion */
348 if ((vaddr[0] & 0x80) == (cmp_val & 0x80))
349 return 0;
wdenkc6097192002-11-03 00:24:07 +0000350
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000351 /* KEEP THE LUSER HAPPY - Print a dot every 1.1 seconds */
352 if (!(i % 110000))
353 putc('.');
wdenkc6097192002-11-03 00:24:07 +0000354
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000355 /* Kick the dog if needed */
356 WATCHDOG_RESET();
357 }
wdenkc6097192002-11-03 00:24:07 +0000358
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000359 return 1;
360} /* wait_for_DQ7() */
wdenkc6097192002-11-03 00:24:07 +0000361
362static int flash_erase8(flash_info_t *info, int s_first, int s_last)
363{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000364 int tcode, rcode = 0;
365 volatile uchar *addr = (uchar *) (info->start[0]);
366 volatile uchar *sector_addr;
367 int flag, prot, sect;
wdenkc6097192002-11-03 00:24:07 +0000368
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000369 /* Validate arguments */
370 if ((s_first < 0) || (s_first > s_last)) {
371 if (info->flash_id == FLASH_UNKNOWN)
372 printf("- missing\n");
373 else
374 printf("- no sectors to erase\n");
375 return 1;
376 }
wdenkc6097192002-11-03 00:24:07 +0000377
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000378 /* Check for KNOWN flash type */
379 if (info->flash_id == FLASH_UNKNOWN) {
380 printf("Can't erase unknown flash type - aborted\n");
381 return 1;
382 }
wdenkc6097192002-11-03 00:24:07 +0000383
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000384 /* Check for protected sectors */
385 prot = 0;
386 for (sect = s_first; sect <= s_last; ++sect) {
387 if (info->protect[sect])
388 prot++;
389 }
390 if (prot) {
391 printf("- Warning: %d protected sectors will not be erased!\n",
392 prot);
393 } else {
394 printf("\n");
395 }
wdenkc6097192002-11-03 00:24:07 +0000396
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000397 /* Start erase on unprotected sectors */
398 for (sect = s_first; sect <= s_last; sect++) {
399 if (info->protect[sect] == 0) { /* not protected */
400 sector_addr = (uchar *) (info->start[sect]);
wdenkc6097192002-11-03 00:24:07 +0000401
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000402 if ((info->flash_id & FLASH_VENDMASK) ==
403 FLASH_MAN_STM)
404 printf("Erasing block %p\n", sector_addr);
405 else
406 printf("Erasing sector %p\n", sector_addr);
wdenkc6097192002-11-03 00:24:07 +0000407
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000408 /* Disable interrupts which might cause timeout */
409 flag = disable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000410
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000411 *(addr + 0x555) = (uchar) 0xAA;
412 *(addr + 0x2aa) = (uchar) 0x55;
413 *(addr + 0x555) = (uchar) 0x80;
414 *(addr + 0x555) = (uchar) 0xAA;
415 *(addr + 0x2aa) = (uchar) 0x55;
416 *sector_addr = (uchar) 0x30; /* sector erase */
wdenkc6097192002-11-03 00:24:07 +0000417
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000418 /*
419 * Wait for each sector to complete, it's more
420 * reliable. According to AMD Spec, you must
421 * issue all erase commands within a specified
422 * timeout. This has been seen to fail, especially
423 * if printf()s are included (for debug)!!
424 * Takes up to 6 seconds.
425 */
426 tcode = wait_for_DQ7((ulong) sector_addr, 0x80, 6000);
wdenkc6097192002-11-03 00:24:07 +0000427
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000428 /* re-enable interrupts if necessary */
429 if (flag)
430 enable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000431
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000432 /* Make sure we didn't timeout */
433 if (tcode) {
434 printf("Timeout\n");
435 rcode = 1;
436 }
437 }
wdenk57b2d802003-06-27 21:31:46 +0000438 }
wdenkc6097192002-11-03 00:24:07 +0000439
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000440 /* wait at least 80us - let's wait 1 ms */
441 udelay(1000);
wdenkc6097192002-11-03 00:24:07 +0000442
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000443 /* reset to read mode */
444 addr = (uchar *) info->start[0];
445 *addr = (uchar) 0xF0; /* reset bank */
wdenkc6097192002-11-03 00:24:07 +0000446
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000447 printf(" done\n");
448 return rcode;
449} /* end flash_erase8() */
wdenkc6097192002-11-03 00:24:07 +0000450
451static int flash_erase32(flash_info_t *info, int s_first, int s_last)
452{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000453 int flag, sect;
454 ulong start, now, last;
455 int prot = 0;
wdenkc6097192002-11-03 00:24:07 +0000456
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000457 /* Validate arguments */
458 if ((s_first < 0) || (s_first > s_last)) {
459 if (info->flash_id == FLASH_UNKNOWN)
460 printf("- missing\n");
461 else
462 printf("- no sectors to erase\n");
463 return 1;
464 }
wdenkc6097192002-11-03 00:24:07 +0000465
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000466 /* Check for KNOWN flash type */
467 if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
468 printf("Can erase only Intel flash types - aborted\n");
469 return 1;
470 }
wdenkc6097192002-11-03 00:24:07 +0000471
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000472 /* Check for protected sectors */
473 for (sect = s_first; sect <= s_last; ++sect) {
474 if (info->protect[sect])
475 prot++;
476 }
477 if (prot) {
478 printf("- Warning: %d protected sectors will not be erased!\n",
479 prot);
480 } else {
481 printf("\n");
482 }
wdenkc6097192002-11-03 00:24:07 +0000483
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000484 start = get_timer(0);
485 last = start;
486 /* Start erase on unprotected sectors */
487 for (sect = s_first; sect <= s_last; sect++) {
488 WATCHDOG_RESET();
489 if (info->protect[sect] == 0) { /* not protected */
490 vu_long *addr = (vu_long *) (info->start[sect]);
491 unsigned long status;
wdenkc6097192002-11-03 00:24:07 +0000492
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000493 /* Disable interrupts which might cause a timeout */
494 flag = disable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000495
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000496 *addr = 0x00500050; /* clear status register */
497 *addr = 0x00200020; /* erase setup */
498 *addr = 0x00D000D0; /* erase confirm */
wdenkc6097192002-11-03 00:24:07 +0000499
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000500 /* re-enable interrupts if necessary */
501 if (flag)
502 enable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000503
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000504 /* Wait at least 80us - let's wait 1 ms */
505 udelay(1000);
wdenkc6097192002-11-03 00:24:07 +0000506
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000507 while (((status = *addr) & 0x00800080) != 0x00800080) {
508 now = get_timer(start);
509 if (now > CONFIG_SYS_FLASH_ERASE_TOUT) {
510 printf("Timeout\n");
511 /* suspend erase */
512 *addr = 0x00B000B0;
513 /* reset to read mode */
514 *addr = 0x00FF00FF;
515 return 1;
516 }
wdenkc6097192002-11-03 00:24:07 +0000517
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000518 /*
519 * show that we're waiting
520 * every second (?)
521 */
522 if ((now - last) > 990) {
523 putc('.');
524 last = now;
525 }
526 }
527 *addr = 0x00FF00FF; /* reset to read mode */
wdenk57b2d802003-06-27 21:31:46 +0000528 }
wdenk57b2d802003-06-27 21:31:46 +0000529 }
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000530 printf(" done\n");
531 return 0;
532}
wdenkc6097192002-11-03 00:24:07 +0000533
534int flash_erase(flash_info_t *info, int s_first, int s_last)
535{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000536 if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040)
537 return flash_erase8(info, s_first, s_last);
538 else
539 return flash_erase32(info, s_first, s_last);
540}
wdenkc6097192002-11-03 00:24:07 +0000541
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000542/*
wdenkc6097192002-11-03 00:24:07 +0000543 * Copy memory to flash, returns:
544 * 0 - OK
545 * 1 - write timeout
546 * 2 - Flash not erased
547 */
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000548static int write_buff8(flash_info_t *info, uchar *src, ulong addr,
549 ulong cnt)
wdenkc6097192002-11-03 00:24:07 +0000550{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000551 ulong cp, wp, data;
552 ulong start;
553 int i, l, rc;
wdenkc6097192002-11-03 00:24:07 +0000554
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000555 start = get_timer(0);
wdenkc6097192002-11-03 00:24:07 +0000556
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000557 wp = (addr & ~3); /* get lower word
558 aligned address */
wdenkc6097192002-11-03 00:24:07 +0000559
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000560 /*
561 * handle unaligned start bytes
562 */
563 l = addr - wp;
564 if (l != 0) {
565 data = 0;
566 for (i = 0, cp = wp; i < l; ++i, ++cp)
567 data = (data << 8) | (*(uchar *) cp);
568
569 for (; i < 4 && cnt > 0; ++i) {
570 data = (data << 8) | *src++;
571 --cnt;
572 ++cp;
573 }
574
575 for (; cnt == 0 && i < 4; ++i, ++cp)
576 data = (data << 8) | (*(uchar *) cp);
577
578 rc = write_word8(info, wp, data);
579 if (rc != 0)
580 return rc;
581
582 wp += 4;
wdenk57b2d802003-06-27 21:31:46 +0000583 }
wdenkc6097192002-11-03 00:24:07 +0000584
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000585 /*
586 * handle word aligned part
587 */
588 while (cnt >= 4) {
589 data = 0;
590 for (i = 0; i < 4; ++i)
591 data = (data << 8) | *src++;
592
593 rc = write_word8(info, wp, data);
594 if (rc != 0)
595 return rc;
596
597 wp += 4;
598 cnt -= 4;
599 if (get_timer(start) > 1000) { /* every second */
600 WATCHDOG_RESET();
601 putc('.');
602 start = get_timer(0);
603 }
wdenk57b2d802003-06-27 21:31:46 +0000604 }
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000605
606 if (cnt == 0)
607 return 0;
wdenkc6097192002-11-03 00:24:07 +0000608
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000609 /*
610 * handle unaligned tail bytes
611 */
wdenk57b2d802003-06-27 21:31:46 +0000612 data = 0;
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000613 for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
614 data = (data << 8) | *src++;
615 --cnt;
wdenk57b2d802003-06-27 21:31:46 +0000616 }
wdenkc6097192002-11-03 00:24:07 +0000617
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000618 for (; i < 4; ++i, ++cp)
619 data = (data << 8) | (*(uchar *) cp);
wdenkc6097192002-11-03 00:24:07 +0000620
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000621 return write_word8(info, wp, data);
622}
wdenkc6097192002-11-03 00:24:07 +0000623
624#define FLASH_WIDTH 4 /* flash bus width in bytes */
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000625static int write_buff32(flash_info_t *info, uchar *src, ulong addr,
626 ulong cnt)
wdenkc6097192002-11-03 00:24:07 +0000627{
628 ulong cp, wp, data;
629 int i, l, rc;
630 ulong start;
631
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000632 start = get_timer(0);
wdenkc6097192002-11-03 00:24:07 +0000633
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000634 if (info->flash_id == FLASH_UNKNOWN)
wdenkc6097192002-11-03 00:24:07 +0000635 return 4;
wdenkc6097192002-11-03 00:24:07 +0000636
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000637 /* get lower FLASH_WIDTH aligned address */
638 wp = (addr & ~(FLASH_WIDTH - 1));
wdenkc6097192002-11-03 00:24:07 +0000639
640 /*
641 * handle unaligned start bytes
642 */
643 if ((l = addr - wp) != 0) {
644 data = 0;
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000645 for (i = 0, cp = wp; i < l; ++i, ++cp)
646 data = (data << 8) | (*(uchar *) cp);
647
648 for (; i < FLASH_WIDTH && cnt > 0; ++i) {
wdenkc6097192002-11-03 00:24:07 +0000649 data = (data << 8) | *src++;
650 --cnt;
651 ++cp;
652 }
wdenkc6097192002-11-03 00:24:07 +0000653
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000654 for (; cnt == 0 && i < FLASH_WIDTH; ++i, ++cp)
655 data = (data << 8) | (*(uchar *) cp);
656
657 rc = write_word32(info, wp, data);
658 if (rc != 0)
659 return rc;
660
wdenkc6097192002-11-03 00:24:07 +0000661 wp += FLASH_WIDTH;
662 }
663
664 /*
665 * handle FLASH_WIDTH aligned part
666 */
667 while (cnt >= FLASH_WIDTH) {
668 data = 0;
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000669 for (i = 0; i < FLASH_WIDTH; ++i)
wdenkc6097192002-11-03 00:24:07 +0000670 data = (data << 8) | *src++;
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000671
672 rc = write_word32(info, wp, data);
673 if (rc != 0)
674 return rc;
675
676 wp += FLASH_WIDTH;
wdenkc6097192002-11-03 00:24:07 +0000677 cnt -= FLASH_WIDTH;
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000678 if (get_timer(start) > 990) { /* every second */
679 putc('.');
wdenkc6097192002-11-03 00:24:07 +0000680 start = get_timer(0);
681 }
682 }
683
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000684 if (cnt == 0)
685 return 0;
wdenkc6097192002-11-03 00:24:07 +0000686
687 /*
688 * handle unaligned tail bytes
689 */
690 data = 0;
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000691 for (i = 0, cp = wp; i < FLASH_WIDTH && cnt > 0; ++i, ++cp) {
wdenkc6097192002-11-03 00:24:07 +0000692 data = (data << 8) | *src++;
693 --cnt;
694 }
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000695
696 for (; i < FLASH_WIDTH; ++i, ++cp)
697 data = (data << 8) | (*(uchar *) cp);
wdenkc6097192002-11-03 00:24:07 +0000698
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000699 return write_word32(info, wp, data);
700}
wdenkc6097192002-11-03 00:24:07 +0000701
702int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
703{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000704 int retval;
wdenkc6097192002-11-03 00:24:07 +0000705
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000706 if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040)
707 retval = write_buff8(info, src, addr, cnt);
708 else
709 retval = write_buff32(info, src, addr, cnt);
wdenkc6097192002-11-03 00:24:07 +0000710
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000711 return retval;
712}
wdenkc6097192002-11-03 00:24:07 +0000713
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000714/*
wdenkc6097192002-11-03 00:24:07 +0000715 * Write a word to Flash, returns:
716 * 0 - OK
717 * 1 - write timeout
718 * 2 - Flash not erased
719 */
720
721static int write_word8(flash_info_t *info, ulong dest, ulong data)
722{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000723 volatile uchar *addr2 = (uchar *) (info->start[0]);
724 volatile uchar *dest2 = (uchar *) dest;
725 volatile uchar *data2 = (uchar *) &data;
726 int flag;
727 int i, tcode, rcode = 0;
wdenkc6097192002-11-03 00:24:07 +0000728
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000729 /* Check if Flash is (sufficently) erased */
730 if ((*((volatile uchar *)dest) & (uchar)data) != (uchar)data)
731 return 2;
wdenkc6097192002-11-03 00:24:07 +0000732
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000733 for (i = 0; i < (4 / sizeof(uchar)); i++) {
734 /* Disable interrupts which might cause a timeout here */
735 flag = disable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000736
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000737 *(addr2 + 0x555) = (uchar) 0xAA;
738 *(addr2 + 0x2aa) = (uchar) 0x55;
739 *(addr2 + 0x555) = (uchar) 0xA0;
wdenkc6097192002-11-03 00:24:07 +0000740
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000741 dest2[i] = data2[i];
wdenkc6097192002-11-03 00:24:07 +0000742
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000743 /* Wait for write to complete, up to 1ms */
744 tcode = wait_for_DQ7((ulong) &dest2[i], data2[i], 1);
wdenkc6097192002-11-03 00:24:07 +0000745
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000746 /* re-enable interrupts if necessary */
747 if (flag)
748 enable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000749
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000750 /* Make sure we didn't timeout */
751 if (tcode)
752 rcode = 1;
wdenk57b2d802003-06-27 21:31:46 +0000753 }
wdenkc6097192002-11-03 00:24:07 +0000754
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000755 return rcode;
756}
wdenkc6097192002-11-03 00:24:07 +0000757
758static int write_word32(flash_info_t *info, ulong dest, ulong data)
759{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000760 vu_long *addr = (vu_long *) dest;
761 ulong status;
762 ulong start;
763 int flag;
764
765 /* Check if Flash is (sufficiently) erased */
766 if ((*addr & data) != data)
767 return 2;
wdenkc6097192002-11-03 00:24:07 +0000768
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000769 /* Disable interrupts which might cause a timeout here */
770 flag = disable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000771
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000772 *addr = 0x00400040; /* write setup */
773 *addr = data;
wdenkc6097192002-11-03 00:24:07 +0000774
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000775 /* re-enable interrupts if necessary */
776 if (flag)
777 enable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000778
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000779 start = get_timer(0);
wdenkc6097192002-11-03 00:24:07 +0000780
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000781 while (((status = *addr) & 0x00800080) != 0x00800080) {
782 WATCHDOG_RESET();
783 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
784 *addr = 0x00FF00FF; /* restore read mode */
785 return 1;
786 }
wdenk57b2d802003-06-27 21:31:46 +0000787 }
wdenkc6097192002-11-03 00:24:07 +0000788
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000789 *addr = 0x00FF00FF; /* restore read mode */
wdenkc6097192002-11-03 00:24:07 +0000790
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000791 return 0;
792}
wdenkc6097192002-11-03 00:24:07 +0000793
794static int _flash_protect(flash_info_t *info, long sector)
795{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000796 int i;
797 int flag;
798 ulong status;
799 int rcode = 0;
800 volatile long *addr = (long *)sector;
wdenkc6097192002-11-03 00:24:07 +0000801
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000802 switch (info->flash_id & FLASH_TYPEMASK) {
wdenk57b2d802003-06-27 21:31:46 +0000803 case FLASH_28F320J3A:
804 case FLASH_28F640J3A:
805 case FLASH_28F128J3A:
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000806 /* Disable interrupts which might cause Flash to timeout */
807 flag = disable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000808
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000809 /* Issue command */
810 *addr = 0x00500050L; /* Clear the status register */
811 *addr = 0x00600060L; /* Set lock bit setup */
812 *addr = 0x00010001L; /* Set lock bit confirm */
wdenkc6097192002-11-03 00:24:07 +0000813
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000814 /* Wait for command completion */
815 for (i = 0; i < 10; i++) { /* 75us timeout, wait 100us */
816 udelay(10);
817 if ((*addr & 0x00800080L) == 0x00800080L)
818 break;
819 }
wdenkc6097192002-11-03 00:24:07 +0000820
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000821 /* Not successful? */
822 status = *addr;
823 if (status != 0x00800080L) {
824 printf("Protect %x sector failed: %x\n",
825 (uint) sector, (uint) status);
826 rcode = 1;
827 }
wdenkc6097192002-11-03 00:24:07 +0000828
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000829 /* Restore read mode */
830 *addr = 0x00ff00ffL;
wdenkc6097192002-11-03 00:24:07 +0000831
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000832 /* re-enable interrupts if necessary */
833 if (flag)
834 enable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000835
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000836 break;
837 case FLASH_AM040: /* No soft sector protection */
838 break;
839 }
wdenkc6097192002-11-03 00:24:07 +0000840
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000841 /* Turn protection on for this sector */
842 for (i = 0; i < info->sector_count; i++) {
843 if (info->start[i] == sector) {
844 info->protect[i] = 1;
845 break;
846 }
wdenk57b2d802003-06-27 21:31:46 +0000847 }
wdenkc6097192002-11-03 00:24:07 +0000848
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000849 return rcode;
850}
wdenkc6097192002-11-03 00:24:07 +0000851
852static int _flash_unprotect(flash_info_t *info, long sector)
853{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000854 int i;
855 int flag;
856 ulong status;
857 int rcode = 0;
858 volatile long *addr = (long *) sector;
wdenkc6097192002-11-03 00:24:07 +0000859
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000860 switch (info->flash_id & FLASH_TYPEMASK) {
wdenk57b2d802003-06-27 21:31:46 +0000861 case FLASH_28F320J3A:
862 case FLASH_28F640J3A:
863 case FLASH_28F128J3A:
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000864 /* Disable interrupts which might cause Flash to timeout */
865 flag = disable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000866
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000867 *addr = 0x00500050L; /* Clear the status register */
868 *addr = 0x00600060L; /* Clear lock bit setup */
869 *addr = 0x00D000D0L; /* Clear lock bit confirm */
wdenkc6097192002-11-03 00:24:07 +0000870
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000871 /* Wait for command completion */
872 for (i = 0; i < 80; i++) { /* 700ms timeout, wait 800 */
873 udelay(10000); /* Delay 10ms */
874 if ((*addr & 0x00800080L) == 0x00800080L)
875 break;
876 }
wdenkc6097192002-11-03 00:24:07 +0000877
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000878 /* Not successful? */
879 status = *addr;
880 if (status != 0x00800080L) {
881 printf("Un-protect %x sector failed: %x\n",
882 (uint) sector, (uint) status);
883 *addr = 0x00ff00ffL;
884 rcode = 1;
885 }
wdenkc6097192002-11-03 00:24:07 +0000886
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000887 /* restore read mode */
888 *addr = 0x00ff00ffL;
wdenkc6097192002-11-03 00:24:07 +0000889
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000890 /* re-enable interrupts if necessary */
891 if (flag)
892 enable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000893
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000894 break;
895 case FLASH_AM040: /* No soft sector protection */
896 break;
wdenk57b2d802003-06-27 21:31:46 +0000897 }
wdenkc6097192002-11-03 00:24:07 +0000898
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000899 /*
900 * Fix Intel's little red wagon. Reprotect
901 * sectors that were protected before we undid
902 * protection on a specific sector.
903 */
904 for (i = 0; i < info->sector_count; i++) {
905 if (info->start[i] != sector) {
906 if (info->protect[i]) {
907 if (_flash_protect(info, info->start[i]))
908 rcode = 1;
909 }
910 } else /* Turn protection off for this sector */
911 info->protect[i] = 0;
912 }
wdenkc6097192002-11-03 00:24:07 +0000913
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000914 return rcode;
915}
wdenkc6097192002-11-03 00:24:07 +0000916
917int flash_real_protect(flash_info_t *info, long sector, int prot)
918{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000919 int rcode;
wdenkc6097192002-11-03 00:24:07 +0000920
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000921 if (prot)
922 rcode = _flash_protect(info, info->start[sector]);
923 else
924 rcode = _flash_unprotect(info, info->start[sector]);
wdenkc6097192002-11-03 00:24:07 +0000925
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000926 return rcode;
927}