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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Schwarz4f62e982011-09-14 15:30:16 -04002/*
3 * (C) Copyright 2006-2008
4 * Stefan Roese, DENX Software Engineering, sr@denx.de.
Simon Schwarz4f62e982011-09-14 15:30:16 -04005 */
6
Tom Riniabb9a042024-05-18 20:20:43 -06007#include <common.h>
Simon Schwarz4f62e982011-09-14 15:30:16 -04008#include <nand.h>
Sean Anderson11a4c702023-11-04 16:37:41 -04009#include <system-constants.h>
Simon Schwarz4f62e982011-09-14 15:30:16 -040010#include <asm/io.h>
Ilya Yanok4e699622011-11-28 06:37:37 +000011#include <linux/mtd/nand_ecc.h>
Tom Rini3bde7e22021-09-22 14:50:35 -040012#include <linux/mtd/rawnand.h>
Simon Schwarz4f62e982011-09-14 15:30:16 -040013
Tom Rinib4213492022-11-12 17:36:51 -050014static int nand_ecc_pos[] = CFG_SYS_NAND_ECCPOS;
Scott Wood2c1b7e12016-05-30 13:57:55 -050015static struct mtd_info *mtd;
Simon Schwarz4f62e982011-09-14 15:30:16 -040016static struct nand_chip nand_chip;
17
Stefano Babic533607c2011-12-15 10:55:37 +010018#define ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
Tom Rinib4213492022-11-12 17:36:51 -050019 CFG_SYS_NAND_ECCSIZE)
20#define ECCTOTAL (ECCSTEPS * CFG_SYS_NAND_ECCBYTES)
Stefano Babic533607c2011-12-15 10:55:37 +010021
22
Simon Schwarz4f62e982011-09-14 15:30:16 -040023#if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
24/*
25 * NAND command for small page NAND devices (512)
26 */
27static int nand_command(int block, int page, uint32_t offs,
28 u8 cmd)
29{
Scott Wood17fed142016-05-30 13:57:56 -050030 struct nand_chip *this = mtd_to_nand(mtd);
Sean Anderson11a4c702023-11-04 16:37:41 -040031 int page_addr = page + block * SYS_NAND_BLOCK_PAGES;
Simon Schwarz4f62e982011-09-14 15:30:16 -040032
Scott Wood2c1b7e12016-05-30 13:57:55 -050033 while (!this->dev_ready(mtd))
Simon Schwarz4f62e982011-09-14 15:30:16 -040034 ;
35
36 /* Begin command latch cycle */
Scott Wood2c1b7e12016-05-30 13:57:55 -050037 this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
Simon Schwarz4f62e982011-09-14 15:30:16 -040038 /* Set ALE and clear CLE to start address cycle */
39 /* Column address */
Scott Wood2c1b7e12016-05-30 13:57:55 -050040 this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
41 this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
42 this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff,
Simon Schwarz4f62e982011-09-14 15:30:16 -040043 NAND_CTRL_ALE); /* A[24:17] */
Simon Schwarz4f62e982011-09-14 15:30:16 -040044 /* Latch in address */
Scott Wood2c1b7e12016-05-30 13:57:55 -050045 this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Simon Schwarz4f62e982011-09-14 15:30:16 -040046
47 /*
48 * Wait a while for the data to be ready
49 */
Scott Wood2c1b7e12016-05-30 13:57:55 -050050 while (!this->dev_ready(mtd))
Simon Schwarz4f62e982011-09-14 15:30:16 -040051 ;
52
53 return 0;
54}
55#else
56/*
57 * NAND command for large page NAND devices (2k)
58 */
59static int nand_command(int block, int page, uint32_t offs,
60 u8 cmd)
61{
Scott Wood17fed142016-05-30 13:57:56 -050062 struct nand_chip *this = mtd_to_nand(mtd);
Sean Anderson11a4c702023-11-04 16:37:41 -040063 int page_addr = page + block * SYS_NAND_BLOCK_PAGES;
Simon Schwarz4f62e982011-09-14 15:30:16 -040064 void (*hwctrl)(struct mtd_info *mtd, int cmd,
65 unsigned int ctrl) = this->cmd_ctrl;
66
Scott Wood2c1b7e12016-05-30 13:57:55 -050067 while (!this->dev_ready(mtd))
Simon Schwarz4f62e982011-09-14 15:30:16 -040068 ;
69
70 /* Emulate NAND_CMD_READOOB */
71 if (cmd == NAND_CMD_READOOB) {
72 offs += CONFIG_SYS_NAND_PAGE_SIZE;
73 cmd = NAND_CMD_READ0;
74 }
75
76 /* Shift the offset from byte addressing to word addressing. */
Brian Norris67675222014-05-06 00:46:17 +053077 if ((this->options & NAND_BUSWIDTH_16) && !nand_opcode_8bits(cmd))
Simon Schwarz4f62e982011-09-14 15:30:16 -040078 offs >>= 1;
79
80 /* Begin command latch cycle */
Scott Wood2c1b7e12016-05-30 13:57:55 -050081 hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
Simon Schwarz4f62e982011-09-14 15:30:16 -040082 /* Set ALE and clear CLE to start address cycle */
83 /* Column address */
Scott Wood2c1b7e12016-05-30 13:57:55 -050084 hwctrl(mtd, offs & 0xff,
85 NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
86 hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
Simon Schwarz4f62e982011-09-14 15:30:16 -040087 /* Row address */
Scott Wood2c1b7e12016-05-30 13:57:55 -050088 hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
89 hwctrl(mtd, ((page_addr >> 8) & 0xff),
90 NAND_CTRL_ALE); /* A[27:20] */
Simon Schwarz4f62e982011-09-14 15:30:16 -040091#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
92 /* One more address cycle for devices > 128MiB */
Scott Wood2c1b7e12016-05-30 13:57:55 -050093 hwctrl(mtd, (page_addr >> 16) & 0x0f,
Simon Schwarz4f62e982011-09-14 15:30:16 -040094 NAND_CTRL_ALE); /* A[31:28] */
95#endif
96 /* Latch in address */
Scott Wood2c1b7e12016-05-30 13:57:55 -050097 hwctrl(mtd, NAND_CMD_READSTART,
98 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
99 hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Simon Schwarz4f62e982011-09-14 15:30:16 -0400100
101 /*
102 * Wait a while for the data to be ready
103 */
Scott Wood2c1b7e12016-05-30 13:57:55 -0500104 while (!this->dev_ready(mtd))
Simon Schwarz4f62e982011-09-14 15:30:16 -0400105 ;
106
107 return 0;
108}
109#endif
110
111static int nand_is_bad_block(int block)
112{
Scott Wood17fed142016-05-30 13:57:56 -0500113 struct nand_chip *this = mtd_to_nand(mtd);
Vladimir Zapolskiycb8183d2015-07-18 01:47:08 +0300114 u_char bb_data[2];
Simon Schwarz4f62e982011-09-14 15:30:16 -0400115
116 nand_command(block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS,
117 NAND_CMD_READOOB);
118
119 /*
120 * Read one byte (or two if it's a 16 bit chip).
121 */
122 if (this->options & NAND_BUSWIDTH_16) {
Scott Wood2c1b7e12016-05-30 13:57:55 -0500123 this->read_buf(mtd, bb_data, 2);
Vladimir Zapolskiycb8183d2015-07-18 01:47:08 +0300124 if (bb_data[0] != 0xff || bb_data[1] != 0xff)
Simon Schwarz4f62e982011-09-14 15:30:16 -0400125 return 1;
126 } else {
Scott Wood2c1b7e12016-05-30 13:57:55 -0500127 this->read_buf(mtd, bb_data, 1);
Vladimir Zapolskiycb8183d2015-07-18 01:47:08 +0300128 if (bb_data[0] != 0xff)
Simon Schwarz4f62e982011-09-14 15:30:16 -0400129 return 1;
130 }
131
132 return 0;
133}
134
Heiko Schocher44bd9b32011-11-01 20:00:30 +0000135#if defined(CONFIG_SYS_NAND_HW_ECC_OOBFIRST)
136static int nand_read_page(int block, int page, uchar *dst)
137{
Scott Wood17fed142016-05-30 13:57:56 -0500138 struct nand_chip *this = mtd_to_nand(mtd);
Stefano Babic533607c2011-12-15 10:55:37 +0100139 u_char ecc_calc[ECCTOTAL];
140 u_char ecc_code[ECCTOTAL];
141 u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
Heiko Schocher44bd9b32011-11-01 20:00:30 +0000142 int i;
Tom Rinib4213492022-11-12 17:36:51 -0500143 int eccsize = CFG_SYS_NAND_ECCSIZE;
144 int eccbytes = CFG_SYS_NAND_ECCBYTES;
Stefano Babic533607c2011-12-15 10:55:37 +0100145 int eccsteps = ECCSTEPS;
Heiko Schocher44bd9b32011-11-01 20:00:30 +0000146 uint8_t *p = dst;
Heiko Schocher44bd9b32011-11-01 20:00:30 +0000147
Heiko Schocher44bd9b32011-11-01 20:00:30 +0000148 nand_command(block, page, 0, NAND_CMD_READOOB);
Scott Wood2c1b7e12016-05-30 13:57:55 -0500149 this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
Heiko Schocher44bd9b32011-11-01 20:00:30 +0000150 nand_command(block, page, 0, NAND_CMD_READ0);
151
152 /* Pick the ECC bytes out of the oob data */
Stefano Babic533607c2011-12-15 10:55:37 +0100153 for (i = 0; i < ECCTOTAL; i++)
Heiko Schocher44bd9b32011-11-01 20:00:30 +0000154 ecc_code[i] = oob_data[nand_ecc_pos[i]];
155
156
157 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
Scott Wood2c1b7e12016-05-30 13:57:55 -0500158 this->ecc.hwctl(mtd, NAND_ECC_READ);
159 this->read_buf(mtd, p, eccsize);
160 this->ecc.calculate(mtd, p, &ecc_calc[i]);
161 this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Heiko Schocher44bd9b32011-11-01 20:00:30 +0000162 }
163
164 return 0;
165}
166#else
Simon Schwarz4f62e982011-09-14 15:30:16 -0400167static int nand_read_page(int block, int page, void *dst)
168{
Scott Wood17fed142016-05-30 13:57:56 -0500169 struct nand_chip *this = mtd_to_nand(mtd);
Stefano Babic533607c2011-12-15 10:55:37 +0100170 u_char ecc_calc[ECCTOTAL];
171 u_char ecc_code[ECCTOTAL];
172 u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
Simon Schwarz4f62e982011-09-14 15:30:16 -0400173 int i;
Tom Rinib4213492022-11-12 17:36:51 -0500174 int eccsize = CFG_SYS_NAND_ECCSIZE;
175 int eccbytes = CFG_SYS_NAND_ECCBYTES;
Stefano Babic533607c2011-12-15 10:55:37 +0100176 int eccsteps = ECCSTEPS;
Simon Schwarz4f62e982011-09-14 15:30:16 -0400177 uint8_t *p = dst;
Simon Schwarz4f62e982011-09-14 15:30:16 -0400178
179 nand_command(block, page, 0, NAND_CMD_READ0);
180
Simon Schwarz4f62e982011-09-14 15:30:16 -0400181 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
Ilya Yanok4e699622011-11-28 06:37:37 +0000182 if (this->ecc.mode != NAND_ECC_SOFT)
Scott Wood2c1b7e12016-05-30 13:57:55 -0500183 this->ecc.hwctl(mtd, NAND_ECC_READ);
184 this->read_buf(mtd, p, eccsize);
185 this->ecc.calculate(mtd, p, &ecc_calc[i]);
Simon Schwarz4f62e982011-09-14 15:30:16 -0400186 }
Scott Wood2c1b7e12016-05-30 13:57:55 -0500187 this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
Simon Schwarz4f62e982011-09-14 15:30:16 -0400188
189 /* Pick the ECC bytes out of the oob data */
Stefano Babic533607c2011-12-15 10:55:37 +0100190 for (i = 0; i < ECCTOTAL; i++)
Simon Schwarz4f62e982011-09-14 15:30:16 -0400191 ecc_code[i] = oob_data[nand_ecc_pos[i]];
192
Stefano Babic533607c2011-12-15 10:55:37 +0100193 eccsteps = ECCSTEPS;
Simon Schwarz4f62e982011-09-14 15:30:16 -0400194 p = dst;
195
196 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
197 /* No chance to do something with the possible error message
198 * from correct_data(). We just hope that all possible errors
199 * are corrected by this routine.
200 */
Scott Wood2c1b7e12016-05-30 13:57:55 -0500201 this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Simon Schwarz4f62e982011-09-14 15:30:16 -0400202 }
203
204 return 0;
205}
Heiko Schocher44bd9b32011-11-01 20:00:30 +0000206#endif
Simon Schwarz4f62e982011-09-14 15:30:16 -0400207
Simon Schwarz4f62e982011-09-14 15:30:16 -0400208/* nand_init() - initialize data to make nand usable by SPL */
209void nand_init(void)
210{
211 /*
212 * Init board specific nand support
213 */
Boris Brezillon3b5f8842016-06-15 20:56:10 +0200214 mtd = nand_to_mtd(&nand_chip);
Simon Schwarz4f62e982011-09-14 15:30:16 -0400215 nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W =
Tom Rinib4213492022-11-12 17:36:51 -0500216 (void __iomem *)CFG_SYS_NAND_BASE;
Simon Schwarz4f62e982011-09-14 15:30:16 -0400217 board_nand_init(&nand_chip);
218
Ilya Yanok4e699622011-11-28 06:37:37 +0000219#ifdef CONFIG_SPL_NAND_SOFTECC
220 if (nand_chip.ecc.mode == NAND_ECC_SOFT) {
221 nand_chip.ecc.calculate = nand_calculate_ecc;
222 nand_chip.ecc.correct = nand_correct_data;
223 }
224#endif
225
Simon Schwarz4f62e982011-09-14 15:30:16 -0400226 if (nand_chip.select_chip)
Scott Wood2c1b7e12016-05-30 13:57:55 -0500227 nand_chip.select_chip(mtd, 0);
Simon Schwarz4f62e982011-09-14 15:30:16 -0400228}
229
Sean Anderson8805f9d2023-11-04 16:37:44 -0400230unsigned int nand_page_size(void)
231{
232 return nand_to_mtd(&nand_chip)->writesize;
233}
234
Simon Schwarz4f62e982011-09-14 15:30:16 -0400235/* Unselect after operation */
236void nand_deselect(void)
237{
238 if (nand_chip.select_chip)
Scott Wood2c1b7e12016-05-30 13:57:55 -0500239 nand_chip.select_chip(mtd, -1);
Simon Schwarz4f62e982011-09-14 15:30:16 -0400240}
Ladislav Michlc6a42002017-04-16 15:31:59 +0200241
242#include "nand_spl_loaders.c"