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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Shengzhou Liuf305cd22013-11-22 17:39:10 +08002/*
3 * Copyright 2013 Freescale Semiconductor, Inc.
Shengzhou Liuf305cd22013-11-22 17:39:10 +08004 */
5
Tom Riniabb9a042024-05-18 20:20:43 -06006#include <common.h>
Shengzhou Liuf305cd22013-11-22 17:39:10 +08007#include <asm/fsl_portals.h>
8#include <asm/fsl_liodn.h>
9
10#ifdef CONFIG_SYS_DPAA_QBMAN
Tom Rini6a5dccc2022-11-16 13:10:41 -050011struct qportal_info qp_info[CFG_SYS_QMAN_NUM_PORTALS] = {
Shengzhou Liuf305cd22013-11-22 17:39:10 +080012 /* dqrr liodn, frame data liodn, liodn off, sdest */
13 SET_QP_INFO(1, 27, 1, 0),
14 SET_QP_INFO(2, 28, 1, 0),
15 SET_QP_INFO(3, 29, 1, 1),
16 SET_QP_INFO(4, 30, 1, 1),
17 SET_QP_INFO(5, 31, 1, 2),
18 SET_QP_INFO(6, 32, 1, 2),
19 SET_QP_INFO(7, 33, 1, 3),
20 SET_QP_INFO(8, 34, 1, 3),
21 SET_QP_INFO(9, 35, 1, 0),
22 SET_QP_INFO(10, 36, 1, 0),
23 SET_QP_INFO(11, 37, 1, 1),
24 SET_QP_INFO(12, 38, 1, 1),
25 SET_QP_INFO(13, 39, 1, 2),
26 SET_QP_INFO(14, 40, 1, 2),
27 SET_QP_INFO(15, 41, 1, 3),
28 SET_QP_INFO(16, 42, 1, 3),
29 SET_QP_INFO(17, 43, 1, 0),
30 SET_QP_INFO(18, 44, 1, 0),
31};
32#endif
33
34#ifdef CONFIG_SYS_SRIO
35struct srio_liodn_id_table srio_liodn_tbl[] = {
36 SET_SRIO_LIODN_BASE(1, 307),
37 SET_SRIO_LIODN_BASE(2, 387),
38};
39int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);
40#endif
41
42struct liodn_id_table liodn_tbl[] = {
43#ifdef CONFIG_SYS_DPAA_QBMAN
44 SET_QMAN_LIODN(62),
45 SET_BMAN_LIODN(63),
46#endif
47
48 SET_SDHC_LIODN(1, 552),
49
50 SET_PME_LIODN(117),
51
52 SET_USB_LIODN(1, "fsl-usb2-mph", 553),
53 SET_USB_LIODN(2, "fsl-usb2-dr", 554),
54
Shengzhou Liu81de9bf2014-01-21 14:11:47 +080055#ifdef CONFIG_FSL_SATA_V2
Shengzhou Liuf305cd22013-11-22 17:39:10 +080056 SET_SATA_LIODN(1, 555),
57 SET_SATA_LIODN(2, 556),
Shengzhou Liu81de9bf2014-01-21 14:11:47 +080058#endif
Shengzhou Liuf305cd22013-11-22 17:39:10 +080059
60 SET_PCI_LIODN_BASE(CONFIG_SYS_FSL_PCIE_COMPAT, 1, 148),
61 SET_PCI_LIODN_BASE(CONFIG_SYS_FSL_PCIE_COMPAT, 2, 228),
62 SET_PCI_LIODN_BASE(CONFIG_SYS_FSL_PCIE_COMPAT, 3, 308),
63 SET_PCI_LIODN_BASE(CONFIG_SYS_FSL_PCIE_COMPAT, 4, 388),
64
Tudor Laurentiu7210d9a2014-11-20 12:09:31 +020065 SET_DMA_LIODN(1, "fsl,elo3-dma", 147),
66 SET_DMA_LIODN(2, "fsl,elo3-dma", 227),
67 SET_DMA_LIODN(3, "fsl,elo3-dma", 226),
Shengzhou Liuf305cd22013-11-22 17:39:10 +080068
69 SET_GUTS_LIODN("fsl,rapidio-delta", 199, rio1liodnr, 0),
70 SET_GUTS_LIODN(NULL, 200, rio2liodnr, 0),
71 SET_GUTS_LIODN(NULL, 201, rio1maintliodnr, 0),
72 SET_GUTS_LIODN(NULL, 202, rio2maintliodnr, 0),
73
74#ifdef CONFIG_SYS_PMAN
75 SET_PMAN_LIODN(1, 513),
76 SET_PMAN_LIODN(2, 514),
77 SET_PMAN_LIODN(3, 515),
78#endif
79
80 /* SET_NEXUS_LIODN(557), -- not yet implemented */
81};
82int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
83
84#ifdef CONFIG_SYS_DPAA_FMAN
Igal Libermane14ec992015-08-18 14:47:05 +030085struct fman_liodn_id_table fman1_liodn_tbl[] = {
Shengzhou Liuf305cd22013-11-22 17:39:10 +080086 SET_FMAN_RX_1G_LIODN(1, 0, 88),
87 SET_FMAN_RX_1G_LIODN(1, 1, 89),
88 SET_FMAN_RX_1G_LIODN(1, 2, 90),
89 SET_FMAN_RX_1G_LIODN(1, 3, 91),
90 SET_FMAN_RX_1G_LIODN(1, 4, 92),
91 SET_FMAN_RX_1G_LIODN(1, 5, 93),
92 SET_FMAN_RX_10G_LIODN(1, 0, 94),
93 SET_FMAN_RX_10G_LIODN(1, 1, 95),
94};
95int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);
96#endif
97
98struct liodn_id_table sec_liodn_tbl[] = {
99 SET_SEC_JR_LIODN_ENTRY(0, 454, 458),
100 SET_SEC_JR_LIODN_ENTRY(1, 455, 459),
101 SET_SEC_JR_LIODN_ENTRY(2, 456, 460),
102 SET_SEC_JR_LIODN_ENTRY(3, 457, 461),
103 SET_SEC_RTIC_LIODN_ENTRY(a, 453),
104 SET_SEC_RTIC_LIODN_ENTRY(b, 549),
105 SET_SEC_RTIC_LIODN_ENTRY(c, 550),
106 SET_SEC_RTIC_LIODN_ENTRY(d, 551),
107 SET_SEC_DECO_LIODN_ENTRY(0, 541, 610),
108 SET_SEC_DECO_LIODN_ENTRY(1, 542, 611),
109 SET_SEC_DECO_LIODN_ENTRY(2, 543, 612),
110 SET_SEC_DECO_LIODN_ENTRY(3, 544, 613),
111 SET_SEC_DECO_LIODN_ENTRY(4, 545, 614),
112 SET_SEC_DECO_LIODN_ENTRY(5, 546, 615),
113 SET_SEC_DECO_LIODN_ENTRY(6, 547, 616),
114 SET_SEC_DECO_LIODN_ENTRY(7, 548, 617),
115};
116int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);
117
118#ifdef CONFIG_SYS_DPAA_RMAN
119struct liodn_id_table rman_liodn_tbl[] = {
120 /* Set RMan block 0-3 liodn offset */
121 SET_RMAN_LIODN(0, 6),
122 SET_RMAN_LIODN(1, 7),
123 SET_RMAN_LIODN(2, 8),
124 SET_RMAN_LIODN(3, 9),
125};
126int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl);
127#endif
128
129struct liodn_id_table liodn_bases[] = {
130#ifdef CONFIG_SYS_DPAA_DCE
131 [FSL_HW_PORTAL_DCE] = SET_LIODN_BASE_2(618, 694),
132#endif
133 [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(462, 558),
134#ifdef CONFIG_SYS_DPAA_FMAN
135 [FSL_HW_PORTAL_FMAN1] = SET_LIODN_BASE_1(973),
136#endif
137#ifdef CONFIG_SYS_DPAA_PME
138 [FSL_HW_PORTAL_PME] = SET_LIODN_BASE_2(770, 846),
139#endif
140#ifdef CONFIG_SYS_DPAA_RMAN
141 [FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(922),
142#endif
143};