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git01.mediatek.com / filogic / uboot / e5481a8d278b8e6a3ef9efbc37c3da832df22c86 / . / include / configs / db-88f6820-gp.h
blob: 8dc73e8b1cc9a870dbc3bc0981a7ee9a2a4d89ba [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]2/*
3 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]4 */
5
6#ifndef _CONFIG_DB_88F6820_GP_H
7#define _CONFIG_DB_88F6820_GP_H
8
9/*
10 * High Level Configuration Options (easy to change)
11 */
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]12
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]13/* I2C */
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]14#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]15
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]16/* Environment in SPI NOR flash */
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]17
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]18#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
19
Stefan Roesec22b7012015-08-11 12:50:58 +0200[diff] [blame]20/* PCIe support */
Stefan Roese83097cf2015-11-25 07:37:00 +0100[diff] [blame]21#ifndef CONFIG_SPL_BUILD
Stefan Roesec22b7012015-08-11 12:50:58 +0200[diff] [blame]22#define CONFIG_PCI_SCAN_SHOW
Stefan Roese83097cf2015-11-25 07:37:00 +0100[diff] [blame]23#endif
Stefan Roesec22b7012015-08-11 12:50:58 +0200[diff] [blame]24
Kevin Smith2366bcc2015-05-18 16:09:46 +0000[diff] [blame]25/* Keep device tree and initrd in lower memory so the kernel can access them */
26#define CONFIG_EXTRA_ENV_SETTINGS \
27 "fdt_high=0x10000000\0" \
28 "initrd_high=0x10000000\0"
29
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]30/* SPL */
Stefan Roese6f7d6672015-07-20 11:20:40 +0200[diff] [blame]31/*
32 * Select the boot device here
33 *
34 * Currently supported are:
35 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
36 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
37 */
38#define SPL_BOOT_SPI_NOR_FLASH 1
39#define SPL_BOOT_SDIO_MMC_CARD 2
40#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
41
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]42/* Defines for SPL */
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]43#define CONFIG_SPL_SIZE (140 << 10)
Pali Rohárbb091462022-01-12 18:32:08 +0100[diff] [blame]44#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - (CONFIG_SPL_TEXT_BASE - 0x40000000))
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]45
46#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
47#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
48
Stefan Roese83097cf2015-11-25 07:37:00 +0100[diff] [blame]49#ifdef CONFIG_SPL_BUILD
50#define CONFIG_SYS_MALLOC_SIMPLE
51#endif
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]52
53#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
54#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
55
Stefan Roese6f7d6672015-07-20 11:20:40 +0200[diff] [blame]56#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
57/* SPL related MMC defines */
Stefan Roese6f7d6672015-07-20 11:20:40 +0200[diff] [blame]58#ifdef CONFIG_SPL_BUILD
59#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
60#endif
61#endif
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]62
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]63/*
64 * mv-common.h should be defined after CMD configs since it used them
65 * to enable certain macros
66 */
67#include "mv-common.h"
68
69#endif /* _CONFIG_DB_88F6820_GP_H */