blob: 59aec1a7313e16b2301315564aa6fc2f2fd95b26 [file] [log] [blame]
Matti Vaittinen9d4ce302019-05-07 10:45:55 +03001// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2019 ROHM Semiconductors
4 *
5 * ROHM BD71837 regulator driver
6 */
7
Matti Vaittinen9d4ce302019-05-07 10:45:55 +03008#include <dm.h>
Simon Glass0f2af882020-05-10 11:40:05 -06009#include <log.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060010#include <linux/bitops.h>
Simon Glassbdd5f812023-09-14 18:21:46 -060011#include <linux/printk.h>
Matti Vaittinen9d4ce302019-05-07 10:45:55 +030012#include <power/bd71837.h>
13#include <power/pmic.h>
14#include <power/regulator.h>
15
16#define HW_STATE_CONTROL 0
17#define DEBUG
18
19/**
20 * struct bd71837_vrange - describe linear range of voltages
21 *
22 * @min_volt: smallest voltage in range
23 * @step: how much voltage changes at each selector step
24 * @min_sel: smallest selector in the range
25 * @max_sel: maximum selector in the range
26 * @rangeval: register value used to select this range if selectible
27 * ranges are supported
28 */
29struct bd71837_vrange {
30 unsigned int min_volt;
31 unsigned int step;
32 u8 min_sel;
33 u8 max_sel;
34 u8 rangeval;
35};
36
37/**
Simon Glassb75b15b2020-12-03 16:55:23 -070038 * struct bd71837_plat - describe regulator control registers
Matti Vaittinen9d4ce302019-05-07 10:45:55 +030039 *
40 * @name: name of the regulator. Used for matching the dt-entry
41 * @enable_reg: register address used to enable/disable regulator
42 * @enablemask: register mask used to enable/disable regulator
43 * @volt_reg: register address used to configure regulator voltage
44 * @volt_mask: register mask used to configure regulator voltage
45 * @ranges: pointer to ranges of regulator voltages and matching register
46 * values
47 * @numranges: number of voltage ranges pointed by ranges
48 * @rangemask: mask for selecting used ranges if multiple ranges are supported
49 * @sel_mask: bit to toggle in order to transfer the register control to SW
50 * @dvs: whether the voltage can be changed when regulator is enabled
51 */
Simon Glassb75b15b2020-12-03 16:55:23 -070052struct bd71837_plat {
Matti Vaittinen9d4ce302019-05-07 10:45:55 +030053 const char *name;
54 u8 enable_reg;
55 u8 enablemask;
56 u8 volt_reg;
57 u8 volt_mask;
58 struct bd71837_vrange *ranges;
59 unsigned int numranges;
60 u8 rangemask;
61 u8 sel_mask;
62 bool dvs;
63};
64
65#define BD_RANGE(_min, _vstep, _sel_low, _sel_hi, _range_sel) \
66{ \
67 .min_volt = (_min), .step = (_vstep), .min_sel = (_sel_low), \
68 .max_sel = (_sel_hi), .rangeval = (_range_sel) \
69}
70
71#define BD_DATA(_name, enreg, enmask, vreg, vmask, _range, rmask, _dvs, sel) \
72{ \
73 .name = (_name), .enable_reg = (enreg), .enablemask = (enmask), \
74 .volt_reg = (vreg), .volt_mask = (vmask), .ranges = (_range), \
75 .numranges = ARRAY_SIZE(_range), .rangemask = (rmask), .dvs = (_dvs), \
76 .sel_mask = (sel) \
77}
78
79static struct bd71837_vrange dvs_buck_vranges[] = {
80 BD_RANGE(700000, 10000, 0, 0x3c, 0),
81 BD_RANGE(1300000, 0, 0x3d, 0x3f, 0),
82};
83
84static struct bd71837_vrange bd71847_buck3_vranges[] = {
85 BD_RANGE(700000, 100000, 0x00, 0x03, 0),
86 BD_RANGE(1050000, 50000, 0x04, 0x05, 0),
87 BD_RANGE(1200000, 150000, 0x06, 0x07, 0),
88 BD_RANGE(550000, 50000, 0x0, 0x7, 0x40),
89 BD_RANGE(675000, 100000, 0x0, 0x3, 0x80),
90 BD_RANGE(1025000, 50000, 0x4, 0x5, 0x80),
91 BD_RANGE(1175000, 150000, 0x6, 0x7, 0x80),
92};
93
94static struct bd71837_vrange bd71847_buck4_vranges[] = {
95 BD_RANGE(3000000, 100000, 0x00, 0x03, 0),
96 BD_RANGE(2600000, 100000, 0x00, 0x03, 40),
97};
98
99static struct bd71837_vrange bd71837_buck5_vranges[] = {
100 BD_RANGE(700000, 100000, 0, 0x3, 0),
101 BD_RANGE(1050000, 50000, 0x04, 0x05, 0),
102 BD_RANGE(1200000, 150000, 0x06, 0x07, 0),
103 BD_RANGE(675000, 100000, 0x0, 0x3, 0x80),
104 BD_RANGE(1025000, 50000, 0x04, 0x05, 0x80),
105 BD_RANGE(1175000, 150000, 0x06, 0x07, 0x80),
106};
107
108static struct bd71837_vrange bd71837_buck6_vranges[] = {
109 BD_RANGE(3000000, 100000, 0x00, 0x03, 0),
110};
111
112static struct bd71837_vrange nodvs_buck3_vranges[] = {
113 BD_RANGE(1605000, 90000, 0, 1, 0),
114 BD_RANGE(1755000, 45000, 2, 4, 0),
115 BD_RANGE(1905000, 45000, 5, 7, 0),
116};
117
118static struct bd71837_vrange nodvs_buck4_vranges[] = {
119 BD_RANGE(800000, 10000, 0x00, 0x3C, 0),
120};
121
122static struct bd71837_vrange ldo1_vranges[] = {
123 BD_RANGE(3000000, 100000, 0x00, 0x03, 0),
124 BD_RANGE(1600000, 100000, 0x00, 0x03, 0x20),
125};
126
127static struct bd71837_vrange ldo2_vranges[] = {
128 BD_RANGE(900000, 0, 0, 0, 0),
129 BD_RANGE(800000, 0, 1, 1, 0),
130};
131
132static struct bd71837_vrange ldo3_vranges[] = {
133 BD_RANGE(1800000, 100000, 0x00, 0x0f, 0),
134};
135
136static struct bd71837_vrange ldo4_vranges[] = {
137 BD_RANGE(900000, 100000, 0x00, 0x09, 0),
138};
139
140static struct bd71837_vrange bd71837_ldo5_vranges[] = {
141 BD_RANGE(1800000, 100000, 0x00, 0x0f, 0),
142};
143
144static struct bd71837_vrange bd71847_ldo5_vranges[] = {
145 BD_RANGE(1800000, 100000, 0x00, 0x0f, 0),
146 BD_RANGE(800000, 100000, 0x00, 0x0f, 0x20),
147};
148
149static struct bd71837_vrange ldo6_vranges[] = {
150 BD_RANGE(900000, 100000, 0x00, 0x09, 0),
151};
152
153static struct bd71837_vrange ldo7_vranges[] = {
154 BD_RANGE(1800000, 100000, 0x00, 0x0f, 0),
155};
156
157/*
158 * We use enable mask 'HW_STATE_CONTROL' to indicate that this regulator
159 * must not be enabled or disabled by SW. The typical use-case for BD71837
160 * is powering NXP i.MX8. In this use-case we (for now) only allow control
161 * for BUCK3 and BUCK4 which are not boot critical.
162 */
Simon Glassb75b15b2020-12-03 16:55:23 -0700163static struct bd71837_plat bd71837_reg_data[] = {
Matti Vaittinen9d4ce302019-05-07 10:45:55 +0300164/* Bucks 1-4 which support dynamic voltage scaling */
165 BD_DATA("BUCK1", BD718XX_BUCK1_CTRL, HW_STATE_CONTROL,
166 BD718XX_BUCK1_VOLT_RUN, DVS_BUCK_RUN_MASK, dvs_buck_vranges, 0,
167 true, BD718XX_BUCK_SEL),
168 BD_DATA("BUCK2", BD718XX_BUCK2_CTRL, HW_STATE_CONTROL,
169 BD718XX_BUCK2_VOLT_RUN, DVS_BUCK_RUN_MASK, dvs_buck_vranges, 0,
170 true, BD718XX_BUCK_SEL),
171 BD_DATA("BUCK3", BD71837_BUCK3_CTRL, BD718XX_BUCK_EN,
172 BD71837_BUCK3_VOLT_RUN, DVS_BUCK_RUN_MASK, dvs_buck_vranges, 0,
173 true, BD718XX_BUCK_SEL),
174 BD_DATA("BUCK4", BD71837_BUCK4_CTRL, BD718XX_BUCK_EN,
175 BD71837_BUCK4_VOLT_RUN, DVS_BUCK_RUN_MASK, dvs_buck_vranges, 0,
176 true, BD718XX_BUCK_SEL),
177/* Bucks 5-8 which do not support dynamic voltage scaling */
178 BD_DATA("BUCK5", BD718XX_1ST_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
179 BD718XX_1ST_NODVS_BUCK_VOLT, BD718XX_1ST_NODVS_BUCK_MASK,
180 bd71837_buck5_vranges, 0x80, false, BD718XX_BUCK_SEL),
181 BD_DATA("BUCK6", BD718XX_2ND_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
182 BD718XX_2ND_NODVS_BUCK_VOLT, BD71837_BUCK6_MASK,
183 bd71837_buck6_vranges, 0, false, BD718XX_BUCK_SEL),
184 BD_DATA("BUCK7", BD718XX_3RD_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
185 BD718XX_3RD_NODVS_BUCK_VOLT, BD718XX_3RD_NODVS_BUCK_MASK,
186 nodvs_buck3_vranges, 0, false, BD718XX_BUCK_SEL),
187 BD_DATA("BUCK8", BD718XX_4TH_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
188 BD718XX_4TH_NODVS_BUCK_VOLT, BD718XX_4TH_NODVS_BUCK_MASK,
189 nodvs_buck4_vranges, 0, false, BD718XX_BUCK_SEL),
190/* LDOs */
191 BD_DATA("LDO1", BD718XX_LDO1_VOLT, HW_STATE_CONTROL, BD718XX_LDO1_VOLT,
192 BD718XX_LDO1_MASK, ldo1_vranges, 0x20, false, BD718XX_LDO_SEL),
193 BD_DATA("LDO2", BD718XX_LDO2_VOLT, HW_STATE_CONTROL, BD718XX_LDO2_VOLT,
194 BD718XX_LDO2_MASK, ldo2_vranges, 0, false, BD718XX_LDO_SEL),
195 BD_DATA("LDO3", BD718XX_LDO3_VOLT, HW_STATE_CONTROL, BD718XX_LDO3_VOLT,
196 BD718XX_LDO3_MASK, ldo3_vranges, 0, false, BD718XX_LDO_SEL),
197 BD_DATA("LDO4", BD718XX_LDO4_VOLT, HW_STATE_CONTROL, BD718XX_LDO4_VOLT,
198 BD718XX_LDO4_MASK, ldo4_vranges, 0, false, BD718XX_LDO_SEL),
199 BD_DATA("LDO5", BD718XX_LDO5_VOLT, HW_STATE_CONTROL, BD718XX_LDO5_VOLT,
200 BD71837_LDO5_MASK, bd71837_ldo5_vranges, 0, false,
201 BD718XX_LDO_SEL),
202 BD_DATA("LDO6", BD718XX_LDO6_VOLT, HW_STATE_CONTROL, BD718XX_LDO6_VOLT,
203 BD718XX_LDO6_MASK, ldo6_vranges, 0, false, BD718XX_LDO_SEL),
204 BD_DATA("LDO7", BD71837_LDO7_VOLT, HW_STATE_CONTROL, BD71837_LDO7_VOLT,
205 BD71837_LDO7_MASK, ldo7_vranges, 0, false, BD718XX_LDO_SEL),
206};
207
Simon Glassb75b15b2020-12-03 16:55:23 -0700208static struct bd71837_plat bd71847_reg_data[] = {
Matti Vaittinen9d4ce302019-05-07 10:45:55 +0300209/* Bucks 1 and 2 which support dynamic voltage scaling */
210 BD_DATA("BUCK1", BD718XX_BUCK1_CTRL, HW_STATE_CONTROL,
211 BD718XX_BUCK1_VOLT_RUN, DVS_BUCK_RUN_MASK, dvs_buck_vranges, 0,
212 true, BD718XX_BUCK_SEL),
213 BD_DATA("BUCK2", BD718XX_BUCK2_CTRL, HW_STATE_CONTROL,
214 BD718XX_BUCK2_VOLT_RUN, DVS_BUCK_RUN_MASK, dvs_buck_vranges, 0,
215 true, BD718XX_BUCK_SEL),
216/* Bucks 3-6 which do not support dynamic voltage scaling */
217 BD_DATA("BUCK3", BD718XX_1ST_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
218 BD718XX_1ST_NODVS_BUCK_VOLT, BD718XX_1ST_NODVS_BUCK_MASK,
219 bd71847_buck3_vranges, 0xc0, false, BD718XX_BUCK_SEL),
220 BD_DATA("BUCK4", BD718XX_2ND_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
221 BD718XX_2ND_NODVS_BUCK_VOLT, BD71837_BUCK6_MASK,
222 bd71847_buck4_vranges, 0x40, false, BD718XX_BUCK_SEL),
223 BD_DATA("BUCK5", BD718XX_3RD_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
224 BD718XX_3RD_NODVS_BUCK_VOLT, BD718XX_3RD_NODVS_BUCK_MASK,
225 nodvs_buck3_vranges, 0, false, BD718XX_BUCK_SEL),
226 BD_DATA("BUCK6", BD718XX_4TH_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
227 BD718XX_4TH_NODVS_BUCK_VOLT, BD718XX_4TH_NODVS_BUCK_MASK,
228 nodvs_buck4_vranges, 0, false, BD718XX_BUCK_SEL),
229/* LDOs */
230 BD_DATA("LDO1", BD718XX_LDO1_VOLT, HW_STATE_CONTROL, BD718XX_LDO1_VOLT,
231 BD718XX_LDO1_MASK, ldo1_vranges, 0x20, false, BD718XX_LDO_SEL),
232 BD_DATA("LDO2", BD718XX_LDO2_VOLT, HW_STATE_CONTROL, BD718XX_LDO2_VOLT,
233 BD718XX_LDO2_MASK, ldo2_vranges, 0, false, BD718XX_LDO_SEL),
234 BD_DATA("LDO3", BD718XX_LDO3_VOLT, HW_STATE_CONTROL, BD718XX_LDO3_VOLT,
235 BD718XX_LDO3_MASK, ldo3_vranges, 0, false, BD718XX_LDO_SEL),
236 BD_DATA("LDO4", BD718XX_LDO4_VOLT, HW_STATE_CONTROL, BD718XX_LDO4_VOLT,
237 BD718XX_LDO4_MASK, ldo4_vranges, 0, false, BD718XX_LDO_SEL),
238 BD_DATA("LDO5", BD718XX_LDO5_VOLT, HW_STATE_CONTROL, BD718XX_LDO5_VOLT,
239 BD71847_LDO5_MASK, bd71847_ldo5_vranges, 0x20, false,
240 BD718XX_LDO_SEL),
241 BD_DATA("LDO6", BD718XX_LDO6_VOLT, HW_STATE_CONTROL, BD718XX_LDO6_VOLT,
242 BD718XX_LDO6_MASK, ldo6_vranges, 0, false, BD718XX_LDO_SEL),
243};
244
245static int vrange_find_value(struct bd71837_vrange *r, unsigned int sel,
246 unsigned int *val)
247{
248 if (!val || sel < r->min_sel || sel > r->max_sel)
249 return -EINVAL;
250
251 *val = r->min_volt + r->step * (sel - r->min_sel);
252 return 0;
253}
254
255static int vrange_find_selector(struct bd71837_vrange *r, int val,
256 unsigned int *sel)
257{
258 int ret = -EINVAL;
259 int num_vals = r->max_sel - r->min_sel + 1;
260
261 if (val >= r->min_volt &&
262 val <= r->min_volt + r->step * (num_vals - 1)) {
263 if (r->step) {
264 *sel = r->min_sel + ((val - r->min_volt) / r->step);
265 ret = 0;
266 } else {
267 *sel = r->min_sel;
268 ret = 0;
269 }
270 }
271 return ret;
272}
273
274static int bd71837_get_enable(struct udevice *dev)
275{
276 int val;
Simon Glassb75b15b2020-12-03 16:55:23 -0700277 struct bd71837_plat *plat = dev_get_plat(dev);
Matti Vaittinen9d4ce302019-05-07 10:45:55 +0300278
279 /*
280 * boot critical regulators on bd71837 must not be controlled by sw
281 * due to the 'feature' which leaves power rails down if bd71837 is
282 * reseted to snvs state. hence we can't get the state here.
283 *
284 * if we are alive it means we probably are on run state and
285 * if the regulator can't be controlled we can assume it is
286 * enabled.
287 */
288 if (plat->enablemask == HW_STATE_CONTROL)
289 return 1;
290
291 val = pmic_reg_read(dev->parent, plat->enable_reg);
292 if (val < 0)
293 return val;
294
295 return (val & plat->enablemask);
296}
297
298static int bd71837_set_enable(struct udevice *dev, bool enable)
299{
300 int val = 0;
Simon Glassb75b15b2020-12-03 16:55:23 -0700301 struct bd71837_plat *plat = dev_get_plat(dev);
Matti Vaittinen9d4ce302019-05-07 10:45:55 +0300302
303 /*
304 * boot critical regulators on bd71837 must not be controlled by sw
305 * due to the 'feature' which leaves power rails down if bd71837 is
306 * reseted to snvs state. Hence we can't set the state here.
307 */
308 if (plat->enablemask == HW_STATE_CONTROL)
Marek Vasutf54598a2022-01-25 03:46:52 +0100309 return enable ? 0 : -EINVAL;
Matti Vaittinen9d4ce302019-05-07 10:45:55 +0300310
311 if (enable)
312 val = plat->enablemask;
313
314 return pmic_clrsetbits(dev->parent, plat->enable_reg, plat->enablemask,
315 val);
316}
317
Marek Vasutf54598a2022-01-25 03:46:52 +0100318static int bd71837_get_value(struct udevice *dev)
319{
320 unsigned int reg, range;
321 unsigned int tmp;
322 struct bd71837_plat *plat = dev_get_plat(dev);
323 int i;
324
325 reg = pmic_reg_read(dev->parent, plat->volt_reg);
326 if (((int)reg) < 0)
327 return reg;
328
329 range = reg & plat->rangemask;
330
331 reg &= plat->volt_mask;
332 reg >>= ffs(plat->volt_mask) - 1;
333
334 for (i = 0; i < plat->numranges; i++) {
335 struct bd71837_vrange *r = &plat->ranges[i];
336
337 if (plat->rangemask && ((plat->rangemask & range) !=
338 r->rangeval))
339 continue;
340
341 if (!vrange_find_value(r, reg, &tmp))
342 return tmp;
343 }
344
345 pr_err("Unknown voltage value read from pmic\n");
346
347 return -EINVAL;
348}
349
Matti Vaittinen9d4ce302019-05-07 10:45:55 +0300350static int bd71837_set_value(struct udevice *dev, int uvolt)
351{
352 unsigned int sel;
353 unsigned int range;
354 int i;
355 int found = 0;
Simon Glassb75b15b2020-12-03 16:55:23 -0700356 struct bd71837_plat *plat = dev_get_plat(dev);
Matti Vaittinen9d4ce302019-05-07 10:45:55 +0300357
358 /*
359 * An under/overshooting may occur if voltage is changed for other
360 * regulators but buck 1,2,3 or 4 when regulator is enabled. Prevent
361 * change to protect the HW
362 */
363 if (!plat->dvs)
364 if (bd71837_get_enable(dev)) {
Marek Vasutf54598a2022-01-25 03:46:52 +0100365 /* If the value is already set, skip the warning. */
366 if (bd71837_get_value(dev) == uvolt)
367 return 0;
Matti Vaittinen9d4ce302019-05-07 10:45:55 +0300368 pr_err("Only DVS bucks can be changed when enabled\n");
369 return -EINVAL;
370 }
371
372 for (i = 0; i < plat->numranges; i++) {
373 struct bd71837_vrange *r = &plat->ranges[i];
374
375 found = !vrange_find_selector(r, uvolt, &sel);
376 if (found) {
377 unsigned int tmp;
378
379 /*
380 * We require exactly the requested value to be
381 * supported - this can be changed later if needed
382 */
383 range = r->rangeval;
384 found = !vrange_find_value(r, sel, &tmp);
385 if (found && tmp == uvolt)
386 break;
387 found = 0;
388 }
389 }
390
391 if (!found)
392 return -EINVAL;
393
394 sel <<= ffs(plat->volt_mask) - 1;
395
396 if (plat->rangemask)
397 sel |= range;
398
399 return pmic_clrsetbits(dev->parent, plat->volt_reg, plat->volt_mask |
400 plat->rangemask, sel);
401}
402
Matti Vaittinen9d4ce302019-05-07 10:45:55 +0300403static int bd71837_regulator_probe(struct udevice *dev)
404{
Simon Glassb75b15b2020-12-03 16:55:23 -0700405 struct bd71837_plat *plat = dev_get_plat(dev);
Matti Vaittinen9d4ce302019-05-07 10:45:55 +0300406 int i, ret;
Simon Glass71fa5b42020-12-03 16:55:18 -0700407 struct dm_regulator_uclass_plat *uc_pdata;
Matti Vaittinen9d4ce302019-05-07 10:45:55 +0300408 int type;
Simon Glassb75b15b2020-12-03 16:55:23 -0700409 struct bd71837_plat *init_data;
Matti Vaittinen9d4ce302019-05-07 10:45:55 +0300410 int data_amnt;
411
412 type = dev_get_driver_data(dev_get_parent(dev));
413
414 switch (type) {
415 case ROHM_CHIP_TYPE_BD71837:
416 init_data = bd71837_reg_data;
417 data_amnt = ARRAY_SIZE(bd71837_reg_data);
418 break;
419 case ROHM_CHIP_TYPE_BD71847:
420 init_data = bd71847_reg_data;
421 data_amnt = ARRAY_SIZE(bd71847_reg_data);
422 break;
423 default:
424 debug("Unknown PMIC type\n");
425 init_data = NULL;
426 data_amnt = 0;
427 break;
428 }
429
430 for (i = 0; i < data_amnt; i++) {
431 if (!strcmp(dev->name, init_data[i].name)) {
432 *plat = init_data[i];
433 if (plat->enablemask != HW_STATE_CONTROL) {
434 /*
435 * Take the regulator under SW control. Ensure
436 * the initial state matches dt flags and then
437 * write the SEL bit
438 */
Simon Glass71fa5b42020-12-03 16:55:18 -0700439 uc_pdata = dev_get_uclass_plat(dev);
Matti Vaittinen9d4ce302019-05-07 10:45:55 +0300440 ret = bd71837_set_enable(dev,
441 !!(uc_pdata->boot_on ||
442 uc_pdata->always_on));
443 if (ret)
444 return ret;
445
446 return pmic_clrsetbits(dev->parent,
447 plat->enable_reg,
448 plat->sel_mask,
449 plat->sel_mask);
450 }
451 return 0;
452 }
453 }
454
455 pr_err("Unknown regulator '%s'\n", dev->name);
456
457 return -ENOENT;
458}
459
460static const struct dm_regulator_ops bd71837_regulator_ops = {
461 .get_value = bd71837_get_value,
462 .set_value = bd71837_set_value,
463 .get_enable = bd71837_get_enable,
464 .set_enable = bd71837_set_enable,
465};
466
467U_BOOT_DRIVER(bd71837_regulator) = {
468 .name = BD718XX_REGULATOR_DRIVER,
469 .id = UCLASS_REGULATOR,
470 .ops = &bd71837_regulator_ops,
471 .probe = bd71837_regulator_probe,
Simon Glassb75b15b2020-12-03 16:55:23 -0700472 .plat_auto = sizeof(struct bd71837_plat),
Matti Vaittinen9d4ce302019-05-07 10:45:55 +0300473};