Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 2 | /* |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 3 | * Atmel DataFlash probing |
| 4 | * |
| 5 | * Copyright (C) 2004-2009, 2015 Freescale Semiconductor, Inc. |
| 6 | * Haikun Wang (haikun.wang@freescale.com) |
Jagan Teki | 42a5f89 | 2016-10-30 23:16:30 +0530 | [diff] [blame] | 7 | */ |
| 8 | |
Simon Glass | 1ab1692 | 2022-07-31 12:28:48 -0600 | [diff] [blame] | 9 | #include <display_options.h> |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 10 | #include <dm.h> |
| 11 | #include <errno.h> |
| 12 | #include <fdtdec.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 13 | #include <log.h> |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 14 | #include <spi.h> |
| 15 | #include <spi_flash.h> |
| 16 | #include <div64.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 17 | #include <linux/delay.h> |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 18 | #include <linux/err.h> |
| 19 | #include <linux/math64.h> |
| 20 | |
| 21 | #include "sf_internal.h" |
| 22 | |
Vignesh R | 1451041 | 2019-02-05 11:29:23 +0530 | [diff] [blame] | 23 | #define CMD_READ_ID 0x9f |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 24 | /* reads can bypass the buffers */ |
| 25 | #define OP_READ_CONTINUOUS 0xE8 |
| 26 | #define OP_READ_PAGE 0xD2 |
| 27 | |
| 28 | /* group B requests can run even while status reports "busy" */ |
| 29 | #define OP_READ_STATUS 0xD7 /* group B */ |
| 30 | |
| 31 | /* move data between host and buffer */ |
| 32 | #define OP_READ_BUFFER1 0xD4 /* group B */ |
| 33 | #define OP_READ_BUFFER2 0xD6 /* group B */ |
| 34 | #define OP_WRITE_BUFFER1 0x84 /* group B */ |
| 35 | #define OP_WRITE_BUFFER2 0x87 /* group B */ |
| 36 | |
| 37 | /* erasing flash */ |
| 38 | #define OP_ERASE_PAGE 0x81 |
| 39 | #define OP_ERASE_BLOCK 0x50 |
| 40 | |
| 41 | /* move data between buffer and flash */ |
| 42 | #define OP_TRANSFER_BUF1 0x53 |
| 43 | #define OP_TRANSFER_BUF2 0x55 |
| 44 | #define OP_MREAD_BUFFER1 0xD4 |
| 45 | #define OP_MREAD_BUFFER2 0xD6 |
| 46 | #define OP_MWERASE_BUFFER1 0x83 |
| 47 | #define OP_MWERASE_BUFFER2 0x86 |
| 48 | #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */ |
| 49 | #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */ |
| 50 | |
| 51 | /* write to buffer, then write-erase to flash */ |
| 52 | #define OP_PROGRAM_VIA_BUF1 0x82 |
| 53 | #define OP_PROGRAM_VIA_BUF2 0x85 |
| 54 | |
| 55 | /* compare buffer to flash */ |
| 56 | #define OP_COMPARE_BUF1 0x60 |
| 57 | #define OP_COMPARE_BUF2 0x61 |
| 58 | |
| 59 | /* read flash to buffer, then write-erase to flash */ |
| 60 | #define OP_REWRITE_VIA_BUF1 0x58 |
| 61 | #define OP_REWRITE_VIA_BUF2 0x59 |
| 62 | |
| 63 | /* |
| 64 | * newer chips report JEDEC manufacturer and device IDs; chip |
| 65 | * serial number and OTP bits; and per-sector writeprotect. |
| 66 | */ |
| 67 | #define OP_READ_ID 0x9F |
| 68 | #define OP_READ_SECURITY 0x77 |
| 69 | #define OP_WRITE_SECURITY_REVC 0x9A |
| 70 | #define OP_WRITE_SECURITY 0x9B /* revision D */ |
| 71 | |
Luca Ellero | dde6722 | 2022-04-26 10:24:09 +0200 | [diff] [blame] | 72 | #define DATAFLASH_SHIFT_EXTID 24 |
| 73 | #define DATAFLASH_SHIFT_ID 40 |
| 74 | |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 75 | struct dataflash { |
| 76 | uint8_t command[16]; |
| 77 | unsigned short page_offset; /* offset in flash address */ |
| 78 | }; |
| 79 | |
Jagan Teki | 42a5f89 | 2016-10-30 23:16:30 +0530 | [diff] [blame] | 80 | /* Return the status of the DataFlash device */ |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 81 | static inline int dataflash_status(struct spi_slave *spi) |
| 82 | { |
| 83 | int ret; |
Jagan Teki | 544a7b4 | 2019-07-22 17:22:57 +0530 | [diff] [blame] | 84 | u8 opcode = OP_READ_STATUS; |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 85 | u8 status; |
Jagan Teki | 544a7b4 | 2019-07-22 17:22:57 +0530 | [diff] [blame] | 86 | |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 87 | /* |
| 88 | * NOTE: at45db321c over 25 MHz wants to write |
| 89 | * a dummy byte after the opcode... |
| 90 | */ |
Jagan Teki | 544a7b4 | 2019-07-22 17:22:57 +0530 | [diff] [blame] | 91 | ret = spi_write_then_read(spi, &opcode, 1, NULL, &status, 1); |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 92 | return ret ? -EIO : status; |
| 93 | } |
| 94 | |
| 95 | /* |
| 96 | * Poll the DataFlash device until it is READY. |
| 97 | * This usually takes 5-20 msec or so; more for sector erase. |
| 98 | * ready: return > 0 |
| 99 | */ |
| 100 | static int dataflash_waitready(struct spi_slave *spi) |
| 101 | { |
| 102 | int status; |
| 103 | int timeout = 2 * CONFIG_SYS_HZ; |
| 104 | int timebase; |
| 105 | |
| 106 | timebase = get_timer(0); |
| 107 | do { |
| 108 | status = dataflash_status(spi); |
| 109 | if (status < 0) |
| 110 | status = 0; |
| 111 | |
| 112 | if (status & (1 << 7)) /* RDY/nBSY */ |
| 113 | return status; |
| 114 | |
| 115 | mdelay(3); |
| 116 | } while (get_timer(timebase) < timeout); |
| 117 | |
| 118 | return -ETIME; |
| 119 | } |
| 120 | |
Jagan Teki | 42a5f89 | 2016-10-30 23:16:30 +0530 | [diff] [blame] | 121 | /* Erase pages of flash */ |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 122 | static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len) |
| 123 | { |
| 124 | struct dataflash *dataflash; |
| 125 | struct spi_flash *spi_flash; |
| 126 | struct spi_slave *spi; |
| 127 | unsigned blocksize; |
| 128 | uint8_t *command; |
| 129 | uint32_t rem; |
| 130 | int status; |
| 131 | |
| 132 | dataflash = dev_get_priv(dev); |
| 133 | spi_flash = dev_get_uclass_priv(dev); |
| 134 | spi = spi_flash->spi; |
| 135 | |
| 136 | blocksize = spi_flash->page_size << 3; |
| 137 | |
| 138 | memset(dataflash->command, 0 , sizeof(dataflash->command)); |
| 139 | command = dataflash->command; |
| 140 | |
| 141 | debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len); |
| 142 | |
| 143 | div_u64_rem(len, spi_flash->page_size, &rem); |
Wenyou.Yang@microchip.com | 9015bb5 | 2017-07-21 13:26:09 +0800 | [diff] [blame] | 144 | if (rem) { |
| 145 | printf("%s: len(0x%x) isn't the multiple of page size(0x%x)\n", |
| 146 | dev->name, len, spi_flash->page_size); |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 147 | return -EINVAL; |
Wenyou.Yang@microchip.com | 9015bb5 | 2017-07-21 13:26:09 +0800 | [diff] [blame] | 148 | } |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 149 | div_u64_rem(offset, spi_flash->page_size, &rem); |
Wenyou.Yang@microchip.com | 9015bb5 | 2017-07-21 13:26:09 +0800 | [diff] [blame] | 150 | if (rem) { |
| 151 | printf("%s: offset(0x%x) isn't the multiple of page size(0x%x)\n", |
| 152 | dev->name, offset, spi_flash->page_size); |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 153 | return -EINVAL; |
Wenyou.Yang@microchip.com | 9015bb5 | 2017-07-21 13:26:09 +0800 | [diff] [blame] | 154 | } |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 155 | |
| 156 | status = spi_claim_bus(spi); |
| 157 | if (status) { |
Jagan Teki | 42a5f89 | 2016-10-30 23:16:30 +0530 | [diff] [blame] | 158 | debug("dataflash: unable to claim SPI bus\n"); |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 159 | return status; |
| 160 | } |
| 161 | |
| 162 | while (len > 0) { |
| 163 | unsigned int pageaddr; |
| 164 | int do_block; |
| 165 | /* |
| 166 | * Calculate flash page address; use block erase (for speed) if |
| 167 | * we're at a block boundary and need to erase the whole block. |
| 168 | */ |
| 169 | pageaddr = div_u64(offset, spi_flash->page_size); |
| 170 | do_block = (pageaddr & 0x7) == 0 && len >= blocksize; |
| 171 | pageaddr = pageaddr << dataflash->page_offset; |
| 172 | |
| 173 | command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE; |
| 174 | command[1] = (uint8_t)(pageaddr >> 16); |
| 175 | command[2] = (uint8_t)(pageaddr >> 8); |
| 176 | command[3] = 0; |
| 177 | |
| 178 | debug("%s ERASE %s: (%x) %x %x %x [%d]\n", |
| 179 | dev->name, do_block ? "block" : "page", |
| 180 | command[0], command[1], command[2], command[3], |
| 181 | pageaddr); |
| 182 | |
Jagan Teki | 544a7b4 | 2019-07-22 17:22:57 +0530 | [diff] [blame] | 183 | status = spi_write_then_read(spi, command, 4, NULL, NULL, 0); |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 184 | if (status < 0) { |
| 185 | debug("%s: erase send command error!\n", dev->name); |
| 186 | return -EIO; |
| 187 | } |
| 188 | |
| 189 | status = dataflash_waitready(spi); |
| 190 | if (status < 0) { |
| 191 | debug("%s: erase waitready error!\n", dev->name); |
| 192 | return status; |
| 193 | } |
| 194 | |
| 195 | if (do_block) { |
| 196 | offset += blocksize; |
| 197 | len -= blocksize; |
| 198 | } else { |
| 199 | offset += spi_flash->page_size; |
| 200 | len -= spi_flash->page_size; |
| 201 | } |
| 202 | } |
| 203 | |
| 204 | spi_release_bus(spi); |
| 205 | |
| 206 | return 0; |
| 207 | } |
| 208 | |
| 209 | /* |
| 210 | * Read from the DataFlash device. |
| 211 | * offset : Start offset in flash device |
| 212 | * len : Amount to read |
| 213 | * buf : Buffer containing the data |
| 214 | */ |
| 215 | static int spi_dataflash_read(struct udevice *dev, u32 offset, size_t len, |
| 216 | void *buf) |
| 217 | { |
| 218 | struct dataflash *dataflash; |
| 219 | struct spi_flash *spi_flash; |
| 220 | struct spi_slave *spi; |
| 221 | unsigned int addr; |
| 222 | uint8_t *command; |
| 223 | int status; |
| 224 | |
| 225 | dataflash = dev_get_priv(dev); |
| 226 | spi_flash = dev_get_uclass_priv(dev); |
| 227 | spi = spi_flash->spi; |
| 228 | |
| 229 | memset(dataflash->command, 0 , sizeof(dataflash->command)); |
| 230 | command = dataflash->command; |
| 231 | |
| 232 | debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len); |
| 233 | debug("READ: (%x) %x %x %x\n", |
| 234 | command[0], command[1], command[2], command[3]); |
| 235 | |
| 236 | /* Calculate flash page/byte address */ |
| 237 | addr = (((unsigned)offset / spi_flash->page_size) |
| 238 | << dataflash->page_offset) |
| 239 | + ((unsigned)offset % spi_flash->page_size); |
| 240 | |
| 241 | status = spi_claim_bus(spi); |
| 242 | if (status) { |
Jagan Teki | 42a5f89 | 2016-10-30 23:16:30 +0530 | [diff] [blame] | 243 | debug("dataflash: unable to claim SPI bus\n"); |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 244 | return status; |
| 245 | } |
| 246 | |
| 247 | /* |
| 248 | * Continuous read, max clock = f(car) which may be less than |
| 249 | * the peak rate available. Some chips support commands with |
| 250 | * fewer "don't care" bytes. Both buffers stay unchanged. |
| 251 | */ |
| 252 | command[0] = OP_READ_CONTINUOUS; |
| 253 | command[1] = (uint8_t)(addr >> 16); |
| 254 | command[2] = (uint8_t)(addr >> 8); |
| 255 | command[3] = (uint8_t)(addr >> 0); |
| 256 | |
| 257 | /* plus 4 "don't care" bytes, command len: 4 + 4 "don't care" bytes */ |
Jagan Teki | 544a7b4 | 2019-07-22 17:22:57 +0530 | [diff] [blame] | 258 | status = spi_write_then_read(spi, command, 8, NULL, buf, len); |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 259 | |
| 260 | spi_release_bus(spi); |
| 261 | |
| 262 | return status; |
| 263 | } |
| 264 | |
| 265 | /* |
| 266 | * Write to the DataFlash device. |
| 267 | * offset : Start offset in flash device |
| 268 | * len : Amount to write |
| 269 | * buf : Buffer containing the data |
| 270 | */ |
| 271 | int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len, |
| 272 | const void *buf) |
| 273 | { |
| 274 | struct dataflash *dataflash; |
| 275 | struct spi_flash *spi_flash; |
| 276 | struct spi_slave *spi; |
| 277 | uint8_t *command; |
| 278 | unsigned int pageaddr, addr, to, writelen; |
| 279 | size_t remaining = len; |
| 280 | u_char *writebuf = (u_char *)buf; |
| 281 | int status = -EINVAL; |
| 282 | |
| 283 | dataflash = dev_get_priv(dev); |
| 284 | spi_flash = dev_get_uclass_priv(dev); |
| 285 | spi = spi_flash->spi; |
| 286 | |
| 287 | memset(dataflash->command, 0 , sizeof(dataflash->command)); |
| 288 | command = dataflash->command; |
| 289 | |
| 290 | debug("%s: write 0x%x..0x%x\n", dev->name, offset, (offset + len)); |
| 291 | |
| 292 | pageaddr = ((unsigned)offset / spi_flash->page_size); |
| 293 | to = ((unsigned)offset % spi_flash->page_size); |
| 294 | if (to + len > spi_flash->page_size) |
| 295 | writelen = spi_flash->page_size - to; |
| 296 | else |
| 297 | writelen = len; |
| 298 | |
| 299 | status = spi_claim_bus(spi); |
| 300 | if (status) { |
Jagan Teki | 42a5f89 | 2016-10-30 23:16:30 +0530 | [diff] [blame] | 301 | debug("dataflash: unable to claim SPI bus\n"); |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 302 | return status; |
| 303 | } |
| 304 | |
| 305 | while (remaining > 0) { |
| 306 | debug("write @ %d:%d len=%d\n", pageaddr, to, writelen); |
| 307 | |
| 308 | /* |
| 309 | * REVISIT: |
| 310 | * (a) each page in a sector must be rewritten at least |
| 311 | * once every 10K sibling erase/program operations. |
| 312 | * (b) for pages that are already erased, we could |
| 313 | * use WRITE+MWRITE not PROGRAM for ~30% speedup. |
| 314 | * (c) WRITE to buffer could be done while waiting for |
| 315 | * a previous MWRITE/MWERASE to complete ... |
| 316 | * (d) error handling here seems to be mostly missing. |
| 317 | * |
| 318 | * Two persistent bits per page, plus a per-sector counter, |
| 319 | * could support (a) and (b) ... we might consider using |
| 320 | * the second half of sector zero, which is just one block, |
| 321 | * to track that state. (On AT91, that sector should also |
| 322 | * support boot-from-DataFlash.) |
| 323 | */ |
| 324 | |
| 325 | addr = pageaddr << dataflash->page_offset; |
| 326 | |
| 327 | /* (1) Maybe transfer partial page to Buffer1 */ |
| 328 | if (writelen != spi_flash->page_size) { |
| 329 | command[0] = OP_TRANSFER_BUF1; |
| 330 | command[1] = (addr & 0x00FF0000) >> 16; |
| 331 | command[2] = (addr & 0x0000FF00) >> 8; |
| 332 | command[3] = 0; |
| 333 | |
| 334 | debug("TRANSFER: (%x) %x %x %x\n", |
| 335 | command[0], command[1], command[2], command[3]); |
| 336 | |
Jagan Teki | 544a7b4 | 2019-07-22 17:22:57 +0530 | [diff] [blame] | 337 | status = spi_write_then_read(spi, command, 4, |
| 338 | NULL, NULL, 0); |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 339 | if (status < 0) { |
| 340 | debug("%s: write(<pagesize) command error!\n", |
| 341 | dev->name); |
| 342 | return -EIO; |
| 343 | } |
| 344 | |
| 345 | status = dataflash_waitready(spi); |
| 346 | if (status < 0) { |
| 347 | debug("%s: write(<pagesize) waitready error!\n", |
| 348 | dev->name); |
| 349 | return status; |
| 350 | } |
| 351 | } |
| 352 | |
| 353 | /* (2) Program full page via Buffer1 */ |
| 354 | addr += to; |
| 355 | command[0] = OP_PROGRAM_VIA_BUF1; |
| 356 | command[1] = (addr & 0x00FF0000) >> 16; |
| 357 | command[2] = (addr & 0x0000FF00) >> 8; |
| 358 | command[3] = (addr & 0x000000FF); |
| 359 | |
| 360 | debug("PROGRAM: (%x) %x %x %x\n", |
| 361 | command[0], command[1], command[2], command[3]); |
| 362 | |
Jagan Teki | 544a7b4 | 2019-07-22 17:22:57 +0530 | [diff] [blame] | 363 | status = spi_write_then_read(spi, command, 4, |
| 364 | writebuf, NULL, writelen); |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 365 | if (status < 0) { |
| 366 | debug("%s: write send command error!\n", dev->name); |
| 367 | return -EIO; |
| 368 | } |
| 369 | |
| 370 | status = dataflash_waitready(spi); |
| 371 | if (status < 0) { |
| 372 | debug("%s: write waitready error!\n", dev->name); |
| 373 | return status; |
| 374 | } |
| 375 | |
| 376 | #ifdef CONFIG_SPI_DATAFLASH_WRITE_VERIFY |
| 377 | /* (3) Compare to Buffer1 */ |
| 378 | addr = pageaddr << dataflash->page_offset; |
| 379 | command[0] = OP_COMPARE_BUF1; |
| 380 | command[1] = (addr & 0x00FF0000) >> 16; |
| 381 | command[2] = (addr & 0x0000FF00) >> 8; |
| 382 | command[3] = 0; |
| 383 | |
| 384 | debug("COMPARE: (%x) %x %x %x\n", |
| 385 | command[0], command[1], command[2], command[3]); |
| 386 | |
Jagan Teki | 544a7b4 | 2019-07-22 17:22:57 +0530 | [diff] [blame] | 387 | status = spi_write_then_read(spi, command, 4, |
| 388 | writebuf, NULL, writelen); |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 389 | if (status < 0) { |
| 390 | debug("%s: write(compare) send command error!\n", |
| 391 | dev->name); |
| 392 | return -EIO; |
| 393 | } |
| 394 | |
| 395 | status = dataflash_waitready(spi); |
| 396 | |
| 397 | /* Check result of the compare operation */ |
| 398 | if (status & (1 << 6)) { |
Jagan Teki | 42a5f89 | 2016-10-30 23:16:30 +0530 | [diff] [blame] | 399 | printf("dataflash: write compare page %u, err %d\n", |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 400 | pageaddr, status); |
| 401 | remaining = 0; |
| 402 | status = -EIO; |
| 403 | break; |
| 404 | } else { |
| 405 | status = 0; |
| 406 | } |
| 407 | |
| 408 | #endif /* CONFIG_SPI_DATAFLASH_WRITE_VERIFY */ |
| 409 | remaining = remaining - writelen; |
| 410 | pageaddr++; |
| 411 | to = 0; |
| 412 | writebuf += writelen; |
| 413 | |
| 414 | if (remaining > spi_flash->page_size) |
| 415 | writelen = spi_flash->page_size; |
| 416 | else |
| 417 | writelen = remaining; |
| 418 | } |
| 419 | |
| 420 | spi_release_bus(spi); |
| 421 | |
| 422 | return 0; |
| 423 | } |
| 424 | |
| 425 | static int add_dataflash(struct udevice *dev, char *name, int nr_pages, |
| 426 | int pagesize, int pageoffset, char revision) |
| 427 | { |
| 428 | struct spi_flash *spi_flash; |
| 429 | struct dataflash *dataflash; |
| 430 | |
| 431 | dataflash = dev_get_priv(dev); |
| 432 | spi_flash = dev_get_uclass_priv(dev); |
| 433 | |
| 434 | dataflash->page_offset = pageoffset; |
| 435 | |
| 436 | spi_flash->name = name; |
| 437 | spi_flash->page_size = pagesize; |
| 438 | spi_flash->size = nr_pages * pagesize; |
| 439 | spi_flash->erase_size = pagesize; |
| 440 | |
| 441 | #ifndef CONFIG_SPL_BUILD |
| 442 | printf("SPI DataFlash: Detected %s with page size ", spi_flash->name); |
| 443 | print_size(spi_flash->page_size, ", erase size "); |
| 444 | print_size(spi_flash->erase_size, ", total "); |
| 445 | print_size(spi_flash->size, ""); |
| 446 | printf(", revision %c", revision); |
| 447 | puts("\n"); |
| 448 | #endif |
| 449 | |
| 450 | return 0; |
| 451 | } |
| 452 | |
Vignesh R | 1451041 | 2019-02-05 11:29:23 +0530 | [diff] [blame] | 453 | struct data_flash_info { |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 454 | char *name; |
| 455 | |
| 456 | /* |
| 457 | * JEDEC id has a high byte of zero plus three data bytes: |
| 458 | * the manufacturer id, then a two byte device id. |
| 459 | */ |
Luca Ellero | dde6722 | 2022-04-26 10:24:09 +0200 | [diff] [blame] | 460 | uint64_t jedec_id; |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 461 | |
| 462 | /* The size listed here is what works with OP_ERASE_PAGE. */ |
| 463 | unsigned nr_pages; |
| 464 | uint16_t pagesize; |
| 465 | uint16_t pageoffset; |
| 466 | |
| 467 | uint16_t flags; |
Luca Ellero | dde6722 | 2022-04-26 10:24:09 +0200 | [diff] [blame] | 468 | #define SUP_EXTID 0x0004 /* supports extended ID data */ |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 469 | #define SUP_POW2PS 0x0002 /* supports 2^N byte pages */ |
| 470 | #define IS_POW2PS 0x0001 /* uses 2^N byte pages */ |
| 471 | }; |
| 472 | |
Vignesh R | 1451041 | 2019-02-05 11:29:23 +0530 | [diff] [blame] | 473 | static struct data_flash_info dataflash_data[] = { |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 474 | /* |
| 475 | * NOTE: chips with SUP_POW2PS (rev D and up) need two entries, |
| 476 | * one with IS_POW2PS and the other without. The entry with the |
| 477 | * non-2^N byte page size can't name exact chip revisions without |
| 478 | * losing backwards compatibility for cmdlinepart. |
| 479 | * |
| 480 | * Those two entries have different name spelling format in order to |
| 481 | * show their difference obviously. |
| 482 | * The upper case refer to the chip isn't in normal 2^N bytes page-size |
| 483 | * mode. |
| 484 | * The lower case refer to the chip is in normal 2^N bytes page-size |
| 485 | * mode. |
| 486 | * |
| 487 | * These newer chips also support 128-byte security registers (with |
| 488 | * 64 bytes one-time-programmable) and software write-protection. |
| 489 | */ |
| 490 | { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS}, |
| 491 | { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS}, |
| 492 | |
| 493 | { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS}, |
| 494 | { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS}, |
| 495 | |
| 496 | { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS}, |
| 497 | { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS}, |
| 498 | |
| 499 | { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS}, |
| 500 | { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS}, |
| 501 | |
| 502 | { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS}, |
| 503 | { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS}, |
| 504 | |
| 505 | { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */ |
| 506 | |
| 507 | { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS}, |
| 508 | { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS}, |
| 509 | |
| 510 | { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS}, |
| 511 | { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS}, |
Luca Ellero | f194938 | 2022-04-26 10:24:10 +0200 | [diff] [blame] | 512 | |
| 513 | { "AT45DB641E", 0x1f28000100ULL, 32768, 264, 9, SUP_EXTID | SUP_POW2PS}, |
| 514 | { "at45db641e", 0x1f28000100ULL, 32768, 256, 8, SUP_EXTID | SUP_POW2PS | IS_POW2PS}, |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 515 | }; |
| 516 | |
Luca Ellero | dde6722 | 2022-04-26 10:24:09 +0200 | [diff] [blame] | 517 | static struct data_flash_info *jedec_lookup(struct spi_slave *spi, |
| 518 | u64 jedec, bool use_extid) |
| 519 | |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 520 | { |
Luca Ellero | dde6722 | 2022-04-26 10:24:09 +0200 | [diff] [blame] | 521 | struct data_flash_info *info; |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 522 | int status; |
| 523 | |
Luca Ellero | dde6722 | 2022-04-26 10:24:09 +0200 | [diff] [blame] | 524 | for (info = dataflash_data; |
| 525 | info < dataflash_data + ARRAY_SIZE(dataflash_data); |
| 526 | info++) { |
| 527 | if (use_extid && !(info->flags & SUP_EXTID)) |
| 528 | continue; |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 529 | |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 530 | if (info->jedec_id == jedec) { |
| 531 | if (info->flags & SUP_POW2PS) { |
| 532 | status = dataflash_status(spi); |
| 533 | if (status < 0) { |
Jagan Teki | 42a5f89 | 2016-10-30 23:16:30 +0530 | [diff] [blame] | 534 | debug("dataflash: status error %d\n", |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 535 | status); |
Luca Ellero | dde6722 | 2022-04-26 10:24:09 +0200 | [diff] [blame] | 536 | return ERR_PTR(status); |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 537 | } |
| 538 | if (status & 0x1) { |
| 539 | if (info->flags & IS_POW2PS) |
| 540 | return info; |
| 541 | } else { |
| 542 | if (!(info->flags & IS_POW2PS)) |
| 543 | return info; |
| 544 | } |
| 545 | } else { |
| 546 | return info; |
| 547 | } |
| 548 | } |
| 549 | } |
| 550 | |
Luca Ellero | dde6722 | 2022-04-26 10:24:09 +0200 | [diff] [blame] | 551 | return ERR_PTR(-ENODEV); |
| 552 | } |
| 553 | |
| 554 | static struct data_flash_info *jedec_probe(struct spi_slave *spi) |
| 555 | { |
| 556 | int tmp; |
| 557 | uint64_t jedec; |
| 558 | uint8_t id[sizeof(jedec)] = {0}; |
| 559 | const unsigned int id_size = 5; |
| 560 | struct data_flash_info *info; |
| 561 | u8 opcode = CMD_READ_ID; |
| 562 | |
| 563 | /* |
| 564 | * JEDEC also defines an optional "extended device information" |
| 565 | * string for after vendor-specific data, after the three bytes |
| 566 | * we use here. Supporting some chips might require using it. |
| 567 | * |
| 568 | * If the vendor ID isn't Atmel's (0x1f), assume this call failed. |
| 569 | * That's not an error; only rev C and newer chips handle it, and |
| 570 | * only Atmel sells these chips. |
| 571 | */ |
| 572 | tmp = spi_write_then_read(spi, &opcode, 1, NULL, id, id_size); |
| 573 | if (tmp < 0) { |
| 574 | printf("dataflash: error %d reading JEDEC ID\n", tmp); |
| 575 | return ERR_PTR(tmp); |
| 576 | } |
| 577 | |
| 578 | if (id[0] != 0x1f) |
| 579 | return NULL; |
| 580 | |
| 581 | jedec = be64_to_cpup((__be64 *)id); |
| 582 | |
| 583 | /* |
| 584 | * First, try to match device using extended device |
| 585 | * information |
| 586 | */ |
| 587 | info = jedec_lookup(spi, jedec >> DATAFLASH_SHIFT_EXTID, true); |
| 588 | if (!IS_ERR(info)) |
| 589 | return info; |
| 590 | /* |
| 591 | * If that fails, make another pass using regular ID |
| 592 | * information |
| 593 | */ |
| 594 | info = jedec_lookup(spi, jedec >> DATAFLASH_SHIFT_ID, false); |
| 595 | if (!IS_ERR(info)) |
| 596 | return info; |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 597 | /* |
| 598 | * Treat other chips as errors ... we won't know the right page |
| 599 | * size (it might be binary) even when we can tell which density |
| 600 | * class is involved (legacy chip id scheme). |
| 601 | */ |
Luca Ellero | dde6722 | 2022-04-26 10:24:09 +0200 | [diff] [blame] | 602 | printf("dataflash: JEDEC id 0x%016llx not handled\n", jedec); |
Jagan Teki | 42a5f89 | 2016-10-30 23:16:30 +0530 | [diff] [blame] | 603 | return ERR_PTR(-ENODEV); |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 604 | } |
| 605 | |
| 606 | /* |
| 607 | * Detect and initialize DataFlash device, using JEDEC IDs on newer chips |
| 608 | * or else the ID code embedded in the status bits: |
| 609 | * |
| 610 | * Device Density ID code #Pages PageSize Offset |
| 611 | * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9 |
| 612 | * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9 |
| 613 | * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9 |
| 614 | * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9 |
| 615 | * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10 |
| 616 | * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10 |
| 617 | * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11 |
| 618 | * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11 |
| 619 | */ |
| 620 | static int spi_dataflash_probe(struct udevice *dev) |
| 621 | { |
Simon Glass | de44acf | 2015-09-28 23:32:01 -0600 | [diff] [blame] | 622 | struct spi_slave *spi = dev_get_parent_priv(dev); |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 623 | struct spi_flash *spi_flash; |
Vignesh R | 1451041 | 2019-02-05 11:29:23 +0530 | [diff] [blame] | 624 | struct data_flash_info *info; |
Jagan Teki | 54111f7 | 2016-10-30 23:16:29 +0530 | [diff] [blame] | 625 | int status; |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 626 | |
| 627 | spi_flash = dev_get_uclass_priv(dev); |
Jagan Teki | bf7adaf | 2016-10-30 23:16:27 +0530 | [diff] [blame] | 628 | spi_flash->spi = spi; |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 629 | spi_flash->dev = dev; |
| 630 | |
Jagan Teki | 54111f7 | 2016-10-30 23:16:29 +0530 | [diff] [blame] | 631 | status = spi_claim_bus(spi); |
| 632 | if (status) |
| 633 | return status; |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 634 | |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 635 | /* |
| 636 | * Try to detect dataflash by JEDEC ID. |
| 637 | * If it succeeds we know we have either a C or D part. |
| 638 | * D will support power of 2 pagesize option. |
| 639 | * Both support the security register, though with different |
| 640 | * write procedures. |
| 641 | */ |
Jagan Teki | 7af73ee | 2016-10-30 23:16:28 +0530 | [diff] [blame] | 642 | info = jedec_probe(spi); |
| 643 | if (IS_ERR(info)) |
Jagan Teki | 54111f7 | 2016-10-30 23:16:29 +0530 | [diff] [blame] | 644 | goto err_jedec_probe; |
| 645 | if (info != NULL) { |
| 646 | status = add_dataflash(dev, info->name, info->nr_pages, |
| 647 | info->pagesize, info->pageoffset, |
| 648 | (info->flags & SUP_POW2PS) ? 'd' : 'c'); |
| 649 | if (status < 0) |
| 650 | goto err_status; |
Luca Ellero | dde6722 | 2022-04-26 10:24:09 +0200 | [diff] [blame] | 651 | else |
| 652 | return status; |
Jagan Teki | 54111f7 | 2016-10-30 23:16:29 +0530 | [diff] [blame] | 653 | } |
| 654 | |
Jagan Teki | 42a5f89 | 2016-10-30 23:16:30 +0530 | [diff] [blame] | 655 | /* |
Jagan Teki | 54111f7 | 2016-10-30 23:16:29 +0530 | [diff] [blame] | 656 | * Older chips support only legacy commands, identifing |
| 657 | * capacity using bits in the status byte. |
| 658 | */ |
| 659 | status = dataflash_status(spi); |
| 660 | if (status <= 0 || status == 0xff) { |
Jagan Teki | 42a5f89 | 2016-10-30 23:16:30 +0530 | [diff] [blame] | 661 | printf("dataflash: read status error %d\n", status); |
Jagan Teki | 54111f7 | 2016-10-30 23:16:29 +0530 | [diff] [blame] | 662 | if (status == 0 || status == 0xff) |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 663 | status = -ENODEV; |
Jagan Teki | 54111f7 | 2016-10-30 23:16:29 +0530 | [diff] [blame] | 664 | goto err_jedec_probe; |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 665 | } |
| 666 | |
Jagan Teki | 42a5f89 | 2016-10-30 23:16:30 +0530 | [diff] [blame] | 667 | /* |
Jagan Teki | 54111f7 | 2016-10-30 23:16:29 +0530 | [diff] [blame] | 668 | * if there's a device there, assume it's dataflash. |
| 669 | * board setup should have set spi->max_speed_max to |
| 670 | * match f(car) for continuous reads, mode 0 or 3. |
| 671 | */ |
| 672 | switch (status & 0x3c) { |
| 673 | case 0x0c: /* 0 0 1 1 x x */ |
| 674 | status = add_dataflash(dev, "AT45DB011B", 512, 264, 9, 0); |
| 675 | break; |
| 676 | case 0x14: /* 0 1 0 1 x x */ |
| 677 | status = add_dataflash(dev, "AT45DB021B", 1024, 264, 9, 0); |
| 678 | break; |
| 679 | case 0x1c: /* 0 1 1 1 x x */ |
| 680 | status = add_dataflash(dev, "AT45DB041x", 2048, 264, 9, 0); |
| 681 | break; |
| 682 | case 0x24: /* 1 0 0 1 x x */ |
| 683 | status = add_dataflash(dev, "AT45DB081B", 4096, 264, 9, 0); |
| 684 | break; |
| 685 | case 0x2c: /* 1 0 1 1 x x */ |
| 686 | status = add_dataflash(dev, "AT45DB161x", 4096, 528, 10, 0); |
| 687 | break; |
| 688 | case 0x34: /* 1 1 0 1 x x */ |
| 689 | status = add_dataflash(dev, "AT45DB321x", 8192, 528, 10, 0); |
| 690 | break; |
| 691 | case 0x38: /* 1 1 1 x x x */ |
| 692 | case 0x3c: |
| 693 | status = add_dataflash(dev, "AT45DB642x", 8192, 1056, 11, 0); |
| 694 | break; |
| 695 | /* obsolete AT45DB1282 not (yet?) supported */ |
| 696 | default: |
Jagan Teki | 42a5f89 | 2016-10-30 23:16:30 +0530 | [diff] [blame] | 697 | printf("dataflash: unsupported device (%x)\n", status & 0x3c); |
Jagan Teki | 54111f7 | 2016-10-30 23:16:29 +0530 | [diff] [blame] | 698 | status = -ENODEV; |
| 699 | goto err_status; |
| 700 | } |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 701 | |
Jagan Teki | 54111f7 | 2016-10-30 23:16:29 +0530 | [diff] [blame] | 702 | return status; |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 703 | |
Jagan Teki | 54111f7 | 2016-10-30 23:16:29 +0530 | [diff] [blame] | 704 | err_status: |
| 705 | spi_free_slave(spi); |
| 706 | err_jedec_probe: |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 707 | spi_release_bus(spi); |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 708 | return status; |
| 709 | } |
| 710 | |
| 711 | static const struct dm_spi_flash_ops spi_dataflash_ops = { |
| 712 | .read = spi_dataflash_read, |
| 713 | .write = spi_dataflash_write, |
| 714 | .erase = spi_dataflash_erase, |
| 715 | }; |
| 716 | |
| 717 | static const struct udevice_id spi_dataflash_ids[] = { |
| 718 | { .compatible = "atmel,at45", }, |
| 719 | { .compatible = "atmel,dataflash", }, |
| 720 | { } |
| 721 | }; |
| 722 | |
| 723 | U_BOOT_DRIVER(spi_dataflash) = { |
| 724 | .name = "spi_dataflash", |
| 725 | .id = UCLASS_SPI_FLASH, |
| 726 | .of_match = spi_dataflash_ids, |
| 727 | .probe = spi_dataflash_probe, |
Simon Glass | 8a2b47f | 2020-12-03 16:55:17 -0700 | [diff] [blame] | 728 | .priv_auto = sizeof(struct dataflash), |
Haikun Wang | 8924285 | 2015-06-26 19:30:27 +0800 | [diff] [blame] | 729 | .ops = &spi_dataflash_ops, |
| 730 | }; |