Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2013 Freescale Semiconductor, Inc. |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 4 | */ |
| 5 | |
Tom Rini | af02676 | 2024-04-30 20:41:48 -0600 | [diff] [blame] | 6 | #include <config.h> |
Simon Glass | 85d6531 | 2019-12-28 10:44:58 -0700 | [diff] [blame] | 7 | #include <clock_legacy.h> |
Simon Glass | a73bda4 | 2015-11-08 23:47:45 -0700 | [diff] [blame] | 8 | #include <console.h> |
Simon Glass | 79fd214 | 2019-08-01 09:46:43 -0600 | [diff] [blame] | 9 | #include <env.h> |
Simon Glass | 9d1f619 | 2019-08-02 09:44:25 -0600 | [diff] [blame] | 10 | #include <env_internal.h> |
Simon Glass | 284f71b | 2019-12-28 10:44:45 -0700 | [diff] [blame] | 11 | #include <init.h> |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 12 | #include <ns16550.h> |
| 13 | #include <malloc.h> |
| 14 | #include <mmc.h> |
| 15 | #include <nand.h> |
| 16 | #include <i2c.h> |
| 17 | #include <fsl_esdhc.h> |
Ying Zhang | f74fd4e | 2013-09-06 17:30:57 +0800 | [diff] [blame] | 18 | #include <spi_flash.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 19 | #include <asm/global_data.h> |
Simon Glass | dd8e224 | 2016-09-24 18:20:10 -0600 | [diff] [blame] | 20 | #include "../common/spl.h" |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 21 | |
| 22 | DECLARE_GLOBAL_DATA_PTR; |
| 23 | |
York Sun | 863e8d8 | 2014-02-11 11:57:26 -0800 | [diff] [blame] | 24 | phys_size_t get_effective_memsize(void) |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 25 | { |
| 26 | return CONFIG_SYS_L2_SIZE; |
| 27 | } |
| 28 | |
| 29 | void board_init_f(ulong bootflag) |
| 30 | { |
| 31 | u32 plat_ratio, bus_clk; |
Tom Rini | d5c3bf2 | 2022-10-28 20:27:12 -0400 | [diff] [blame] | 32 | ccsr_gur_t *gur = (void *)CFG_SYS_MPC85xx_GUTS_ADDR; |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 33 | |
Pali Rohár | fecba2e | 2022-08-01 15:31:43 +0200 | [diff] [blame] | 34 | /* |
| 35 | * Call board_early_init_f() as early as possible as it workarounds |
| 36 | * reboot loop due to broken CPLD state machine for reset line. |
| 37 | */ |
| 38 | board_early_init_f(); |
| 39 | |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 40 | console_init_f(); |
| 41 | |
| 42 | /* Set pmuxcr to allow both i2c1 and i2c2 */ |
| 43 | setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000); |
| 44 | setbits_be32(&gur->pmuxcr, |
| 45 | in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); |
| 46 | |
| 47 | /* Read back the register to synchronize the write. */ |
| 48 | in_be32(&gur->pmuxcr); |
| 49 | |
Ying Zhang | f74fd4e | 2013-09-06 17:30:57 +0800 | [diff] [blame] | 50 | #ifdef CONFIG_SPL_SPI_BOOT |
| 51 | clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA); |
| 52 | #endif |
| 53 | |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 54 | /* initialize selected port with appropriate baud rate */ |
| 55 | plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; |
| 56 | plat_ratio >>= 1; |
Tom Rini | 8c70baa | 2021-12-14 13:36:40 -0500 | [diff] [blame] | 57 | bus_clk = get_board_sys_clk() * plat_ratio; |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 58 | gd->bus_clk = bus_clk; |
| 59 | |
Tom Rini | df6a215 | 2022-11-16 13:10:28 -0500 | [diff] [blame] | 60 | ns16550_init((struct ns16550 *)CFG_SYS_NS16550_COM1, |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 61 | bus_clk / 16 / CONFIG_BAUDRATE); |
| 62 | #ifdef CONFIG_SPL_MMC_BOOT |
| 63 | puts("\nSD boot...\n"); |
Ying Zhang | f74fd4e | 2013-09-06 17:30:57 +0800 | [diff] [blame] | 64 | #elif defined(CONFIG_SPL_SPI_BOOT) |
| 65 | puts("\nSPI Flash boot...\n"); |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 66 | #endif |
| 67 | |
| 68 | /* copy code to RAM and jump to it - this should not return */ |
| 69 | /* NOTE - code has to be copied out of NAND buffer before |
| 70 | * other blocks can be read. |
| 71 | */ |
Tom Rini | 6de36a7 | 2022-05-26 16:59:30 -0400 | [diff] [blame] | 72 | relocate_code(CONFIG_VAL(RELOC_STACK), 0, CONFIG_SPL_RELOC_TEXT_BASE); |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 73 | } |
| 74 | |
| 75 | void board_init_r(gd_t *gd, ulong dest_addr) |
| 76 | { |
| 77 | /* Pointer is writable since we allocated a register for it */ |
Tom Rini | d75a779 | 2022-05-27 16:19:05 -0400 | [diff] [blame] | 78 | gd = (gd_t *)CONFIG_VAL(GD_ADDR); |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 79 | struct bd_info *bd; |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 80 | |
| 81 | memset(gd, 0, sizeof(gd_t)); |
Tom Rini | d75a779 | 2022-05-27 16:19:05 -0400 | [diff] [blame] | 82 | bd = (struct bd_info *)(CONFIG_VAL(GD_ADDR) + sizeof(gd_t)); |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 83 | memset(bd, 0, sizeof(struct bd_info)); |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 84 | gd->bd = bd; |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 85 | |
Simon Glass | 302445a | 2017-01-23 13:31:22 -0700 | [diff] [blame] | 86 | arch_cpu_init(); |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 87 | get_clocks(); |
Tom Rini | 6de36a7 | 2022-05-26 16:59:30 -0400 | [diff] [blame] | 88 | mem_malloc_init(CONFIG_VAL(RELOC_MALLOC_ADDR), |
| 89 | CONFIG_VAL(RELOC_MALLOC_SIZE)); |
Sumit Garg | 2ff056b | 2016-05-25 12:41:48 -0400 | [diff] [blame] | 90 | gd->flags |= GD_FLG_FULL_MALLOC_INIT; |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 91 | |
Pali Rohár | 7a2eb67 | 2022-04-03 00:24:27 +0200 | [diff] [blame] | 92 | #ifdef CONFIG_SPL_ENV_SUPPORT |
Ying Zhang | b8b404d | 2013-09-06 17:30:58 +0800 | [diff] [blame] | 93 | #ifndef CONFIG_SPL_NAND_BOOT |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 94 | env_init(); |
Ying Zhang | b8b404d | 2013-09-06 17:30:58 +0800 | [diff] [blame] | 95 | #endif |
Pali Rohár | 7a2eb67 | 2022-04-03 00:24:27 +0200 | [diff] [blame] | 96 | #endif |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 97 | #ifdef CONFIG_SPL_MMC_BOOT |
| 98 | mmc_initialize(bd); |
| 99 | #endif |
Pali Rohár | 7a2eb67 | 2022-04-03 00:24:27 +0200 | [diff] [blame] | 100 | #ifdef CONFIG_SPL_ENV_SUPPORT |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 101 | /* relocate environment function pointers etc. */ |
Ying Zhang | b8b404d | 2013-09-06 17:30:58 +0800 | [diff] [blame] | 102 | #ifdef CONFIG_SPL_NAND_BOOT |
| 103 | nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, |
Tom Rini | 5cd7ece | 2019-11-18 20:02:10 -0500 | [diff] [blame] | 104 | (uchar *)SPL_ENV_ADDR); |
| 105 | gd->env_addr = (ulong)(SPL_ENV_ADDR); |
Simon Glass | 4bc2ad2 | 2017-08-03 12:21:56 -0600 | [diff] [blame] | 106 | gd->env_valid = ENV_VALID; |
Ying Zhang | b8b404d | 2013-09-06 17:30:58 +0800 | [diff] [blame] | 107 | #else |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 108 | env_relocate(); |
Ying Zhang | b8b404d | 2013-09-06 17:30:58 +0800 | [diff] [blame] | 109 | #endif |
Pali Rohár | 7a2eb67 | 2022-04-03 00:24:27 +0200 | [diff] [blame] | 110 | #endif |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 111 | |
Tom Rini | 52b2e26 | 2021-08-18 23:12:24 -0400 | [diff] [blame] | 112 | #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 113 | i2c_init_all(); |
| 114 | #else |
| 115 | i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); |
| 116 | #endif |
| 117 | |
Simon Glass | d35f338 | 2017-04-06 12:47:05 -0600 | [diff] [blame] | 118 | dram_init(); |
Ying Zhang | b8b404d | 2013-09-06 17:30:58 +0800 | [diff] [blame] | 119 | #ifdef CONFIG_SPL_NAND_BOOT |
| 120 | puts("Tertiary program loader running in sram..."); |
| 121 | #else |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 122 | puts("Second program loader running in sram...\n"); |
Ying Zhang | b8b404d | 2013-09-06 17:30:58 +0800 | [diff] [blame] | 123 | #endif |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 124 | |
| 125 | #ifdef CONFIG_SPL_MMC_BOOT |
| 126 | mmc_boot(); |
Ying Zhang | f74fd4e | 2013-09-06 17:30:57 +0800 | [diff] [blame] | 127 | #elif defined(CONFIG_SPL_SPI_BOOT) |
Simon Glass | dd8e224 | 2016-09-24 18:20:10 -0600 | [diff] [blame] | 128 | fsl_spi_boot(); |
Ying Zhang | b8b404d | 2013-09-06 17:30:58 +0800 | [diff] [blame] | 129 | #elif defined(CONFIG_SPL_NAND_BOOT) |
| 130 | nand_boot(); |
Ying Zhang | 28027d7 | 2013-09-06 17:30:56 +0800 | [diff] [blame] | 131 | #endif |
| 132 | } |