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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Sergey Kubushyne8f39122007-08-10 20:26:18 +02002/*
3 * (C) Copyright 2003
4 * Texas Instruments <www.ti.com>
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
10 * (C) Copyright 2002
11 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
12 * Alex Zuepke <azu@sysgo.de>
13 *
14 * (C) Copyright 2002-2004
Detlev Zundelf1b3f2b2009-05-13 10:54:10 +020015 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
Sergey Kubushyne8f39122007-08-10 20:26:18 +020016 *
17 * (C) Copyright 2004
18 * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
19 *
20 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
Sergey Kubushyne8f39122007-08-10 20:26:18 +020021 */
22
Tom Rinia4312892024-04-30 07:35:53 -060023#include <config.h>
Simon Glass97589732020-05-10 11:40:02 -060024#include <init.h>
Simon Glass495a5dc2019-11-14 12:57:30 -070025#include <time.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060026#include <asm/global_data.h>
Nick Thompson283398b2009-11-12 11:02:17 -050027#include <asm/io.h>
Heiko Schocher420cd0a2011-09-14 19:44:00 +000028#include <asm/arch/timer_defs.h>
Christian Riesch93757cf2011-12-09 16:54:01 +010029#include <div64.h>
Simon Glassdbd79542020-05-10 11:40:11 -060030#include <linux/delay.h>
Sergey Kubushyne8f39122007-08-10 20:26:18 +020031
Nick Thompson1c92d8e2010-12-11 10:46:46 -050032DECLARE_GLOBAL_DATA_PTR;
33
Nick Thompson283398b2009-11-12 11:02:17 -050034static struct davinci_timer * const timer =
Tom Rini6a5dccc2022-11-16 13:10:41 -050035 (struct davinci_timer *)CFG_SYS_TIMERBASE;
Sergey Kubushyne8f39122007-08-10 20:26:18 +020036
Nick Thompson1c92d8e2010-12-11 10:46:46 -050037#define TIMER_LOAD_VAL 0xffffffff
Peter Pearsee7680982008-02-01 16:50:24 +000038
Nick Thompson1c92d8e2010-12-11 10:46:46 -050039#define TIM_CLK_DIV 16
Sergey Kubushyne8f39122007-08-10 20:26:18 +020040
41int timer_init(void)
42{
43 /* We are using timer34 in unchained 32-bit mode, full speed */
Nick Thompson283398b2009-11-12 11:02:17 -050044 writel(0x0, &timer->tcr);
45 writel(0x0, &timer->tgcr);
46 writel(0x06 | ((TIM_CLK_DIV - 1) << 8), &timer->tgcr);
47 writel(0x0, &timer->tim34);
48 writel(TIMER_LOAD_VAL, &timer->prd34);
Nick Thompson283398b2009-11-12 11:02:17 -050049 writel(2 << 22, &timer->tcr);
Tom Rini6a5dccc2022-11-16 13:10:41 -050050 gd->arch.timer_rate_hz = CFG_SYS_HZ_CLOCK / TIM_CLK_DIV;
Simon Glass9cbe003a2012-12-13 20:48:36 +000051 gd->arch.timer_reset_value = 0;
Sergey Kubushyne8f39122007-08-10 20:26:18 +020052
53 return(0);
54}
55
Nick Thompson1c92d8e2010-12-11 10:46:46 -050056/*
57 * Get the current 64 bit timer tick count
58 */
59unsigned long long get_ticks(void)
Sergey Kubushyne8f39122007-08-10 20:26:18 +020060{
Nick Thompson1c92d8e2010-12-11 10:46:46 -050061 unsigned long now = readl(&timer->tim34);
62
63 /* increment tbu if tbl has rolled over */
Simon Glass2655ee12012-12-13 20:48:34 +000064 if (now < gd->arch.tbl)
Simon Glass8ca15202012-12-13 20:48:33 +000065 gd->arch.tbu++;
Simon Glass2655ee12012-12-13 20:48:34 +000066 gd->arch.tbl = now;
Sergey Kubushyne8f39122007-08-10 20:26:18 +020067
Simon Glass2655ee12012-12-13 20:48:34 +000068 return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
Sergey Kubushyne8f39122007-08-10 20:26:18 +020069}
70
Dirk Behme866c3212008-03-26 09:53:29 +010071ulong get_timer(ulong base)
72{
Nick Thompson1c92d8e2010-12-11 10:46:46 -050073 unsigned long long timer_diff;
Dirk Behme866c3212008-03-26 09:53:29 +010074
Simon Glass9cbe003a2012-12-13 20:48:36 +000075 timer_diff = get_ticks() - gd->arch.timer_reset_value;
Nick Thompson1c92d8e2010-12-11 10:46:46 -050076
Simon Glass6ed6e032012-12-13 20:48:32 +000077 return lldiv(timer_diff,
78 (gd->arch.timer_rate_hz / CONFIG_SYS_HZ)) - base;
Sergey Kubushyne8f39122007-08-10 20:26:18 +020079}
80
Ingo van Lilf0f778a2009-11-24 14:09:21 +010081void __udelay(unsigned long usec)
Sergey Kubushyne8f39122007-08-10 20:26:18 +020082{
Nick Thompson1c92d8e2010-12-11 10:46:46 -050083 unsigned long long endtime;
Sergey Kubushyne8f39122007-08-10 20:26:18 +020084
Simon Glass6ed6e032012-12-13 20:48:32 +000085 endtime = lldiv((unsigned long long)usec * gd->arch.timer_rate_hz,
Christian Riesch93757cf2011-12-09 16:54:01 +010086 1000000UL);
Nick Thompson1c92d8e2010-12-11 10:46:46 -050087 endtime += get_ticks();
Sergey Kubushyne8f39122007-08-10 20:26:18 +020088
Nick Thompson1c92d8e2010-12-11 10:46:46 -050089 while (get_ticks() < endtime)
90 ;
Sergey Kubushyne8f39122007-08-10 20:26:18 +020091}
92
93/*
94 * This function is derived from PowerPC code (timebase clock frequency).
95 * On ARM it returns the number of timer ticks per second.
96 */
97ulong get_tbclk(void)
98{
Simon Glass6ed6e032012-12-13 20:48:32 +000099 return gd->arch.timer_rate_hz;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200100}
Heiko Schochera2cddad2011-09-14 19:44:02 +0000101
102#ifdef CONFIG_HW_WATCHDOG
103static struct davinci_timer * const wdttimer =
104 (struct davinci_timer *)CONFIG_SYS_WDTTIMERBASE;
105
106/*
107 * See prufw2.pdf for using Timer as a WDT
108 */
109void davinci_hw_watchdog_enable(void)
110{
111 writel(0x0, &wdttimer->tcr);
112 writel(0x0, &wdttimer->tgcr);
113 /* TIMMODE = 2h */
114 writel(0x08 | 0x03 | ((TIM_CLK_DIV - 1) << 8), &wdttimer->tgcr);
115 writel(CONFIG_SYS_WDT_PERIOD_LOW, &wdttimer->prd12);
116 writel(CONFIG_SYS_WDT_PERIOD_HIGH, &wdttimer->prd34);
117 writel(2 << 22, &wdttimer->tcr);
118 writel(0x0, &wdttimer->tim12);
119 writel(0x0, &wdttimer->tim34);
120 /* set WDEN bit, WDKEY 0xa5c6 */
121 writel(0xa5c64000, &wdttimer->wdtcr);
122 /* clear counter register */
123 writel(0xda7e4000, &wdttimer->wdtcr);
124}
125
126void davinci_hw_watchdog_reset(void)
127{
128 writel(0xa5c64000, &wdttimer->wdtcr);
129 writel(0xda7e4000, &wdttimer->wdtcr);
130}
131#endif