blob: f5922fc416eb081df7c25ece742018e20a58dd96 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Wolfgang Wegner406471c2010-01-25 11:27:44 +01002/*
3 * Configuration settings for the Sentec Cobra Board.
4 *
5 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
Wolfgang Wegner406471c2010-01-25 11:27:44 +01006 */
7
8/*
9 * configuration for ASTRO "Urmel" board.
10 * Originating from Cobra5272 configuration, messed up by
11 * Wolfgang Wegner <w.wegner@astro-kom.de>
12 * Please do not bother the original author with bug reports
13 * concerning this file.
14 */
15
16#ifndef _CONFIG_ASTRO_MCF5373L_H
17#define _CONFIG_ASTRO_MCF5373L_H
18
Marek Vasut1b476f92012-09-23 17:41:25 +020019#include <linux/stringify.h>
20
Wolfgang Wegner406471c2010-01-25 11:27:44 +010021/*
22 * set the card type to actually compile for; either of
23 * the possibilities listed below has to be used!
24 */
Tom Rinie8eb04a2021-08-19 15:16:15 -040025#define ASTRO_V532 1
Wolfgang Wegner406471c2010-01-25 11:27:44 +010026
Tom Rinie8eb04a2021-08-19 15:16:15 -040027#if ASTRO_V532
Wolfgang Wegner406471c2010-01-25 11:27:44 +010028#define ASTRO_ID 0xF8
Tom Rinie8eb04a2021-08-19 15:16:15 -040029#elif ASTRO_V512
Wolfgang Wegner406471c2010-01-25 11:27:44 +010030#define ASTRO_ID 0xFA
Tom Rinie8eb04a2021-08-19 15:16:15 -040031#elif ASTRO_TWIN7S2
Wolfgang Wegner406471c2010-01-25 11:27:44 +010032#define ASTRO_ID 0xF9
Tom Rinie8eb04a2021-08-19 15:16:15 -040033#elif ASTRO_V912
Wolfgang Wegner406471c2010-01-25 11:27:44 +010034#define ASTRO_ID 0xFC
Tom Rinie8eb04a2021-08-19 15:16:15 -040035#elif ASTRO_COFDMDUOS2
Wolfgang Wegner406471c2010-01-25 11:27:44 +010036#define ASTRO_ID 0xFB
37#else
38#error No card type defined!
39#endif
40
Wolfgang Wegner406471c2010-01-25 11:27:44 +010041/*
Wolfgang Denkdc25d152010-10-04 19:58:00 +020042 * CONFIG_RAM defines if u-boot is loaded via BDM (or started from
Wolfgang Wegner406471c2010-01-25 11:27:44 +010043 * a different bootloader that has already performed RAM setup) or
44 * started directly from flash, which is the regular case for production
45 * boards.
46 */
Wolfgang Denkdc25d152010-10-04 19:58:00 +020047#ifdef CONFIG_RAM
Wolfgang Wegner406471c2010-01-25 11:27:44 +010048#define CONFIG_MONITOR_IS_IN_RAM
Wolfgang Wegner406471c2010-01-25 11:27:44 +010049#endif
50
Wolfgang Wegner406471c2010-01-25 11:27:44 +010051/* I2C */
Wolfgang Wegner406471c2010-01-25 11:27:44 +010052
53/*
54 * Defines processor clock - important for correct timings concerning serial
55 * interface etc.
Wolfgang Wegner406471c2010-01-25 11:27:44 +010056 */
57
Tom Rini6a5dccc2022-11-16 13:10:41 -050058#define CFG_SYS_CLK 80000000
59#define CFG_SYS_CPU_CLK (CFG_SYS_CLK * 3)
Tom Rinibb4dd962022-11-16 13:10:37 -050060#define CFG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */
Wolfgang Wegner406471c2010-01-25 11:27:44 +010061
Wolfgang Wegner406471c2010-01-25 11:27:44 +010062/*
63 * Define baudrate for UART1 (console output, tftp, ...)
64 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
Tom Rini6a5dccc2022-11-16 13:10:41 -050065 * CFG_SYS_BAUDRATE_TABLE defines values that can be selected
Wolfgang Wegner406471c2010-01-25 11:27:44 +010066 * in u-boot command interface
67 */
68
Tom Rini6a5dccc2022-11-16 13:10:41 -050069#define CFG_SYS_UART_PORT (2)
70#define CFG_SYS_UART2_ALT3_GPIO
Wolfgang Wegner406471c2010-01-25 11:27:44 +010071
72/*
73 * Watchdog configuration; Watchdog is disabled for running from RAM
74 * and set to highest possible value else. Beware there is no check
75 * in the watchdog code to validate the timeout value set here!
76 */
77
78#ifndef CONFIG_MONITOR_IS_IN_RAM
Wolfgang Wegner406471c2010-01-25 11:27:44 +010079#define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */
80#endif
81
82/*
83 * Configuration for environment
84 * Environment is located in the last sector of the flash
85 */
86
87#ifndef CONFIG_MONITOR_IS_IN_RAM
Wolfgang Wegner406471c2010-01-25 11:27:44 +010088#else
89/*
90 * environment in RAM - This is used to use a single PC-based application
91 * to load an image, load U-Boot, load an environment and then start U-Boot
92 * to execute the commands from the environment. Feedback is done via setting
93 * and reading memory locations.
94 */
Wolfgang Wegner406471c2010-01-25 11:27:44 +010095#endif
96
97/* here we put our FPGA configuration... */
Wolfgang Wegner406471c2010-01-25 11:27:44 +010098
99/* Define user parameters that have to be customized most likely */
100
101/* AUTOBOOT settings - booting images automatically by u-boot after power on */
102
103/*
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100104 * The following settings will be contained in the environment block ; if you
105 * want to use a neutral environment all those settings can be manually set in
106 * u-boot: 'set' command
107 */
108
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100109#define CONFIG_EXTRA_ENV_SETTINGS \
110 "loaderversion=11\0" \
Marek Vasut1b476f92012-09-23 17:41:25 +0200111 "card_id="__stringify(ASTRO_ID)"\0" \
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100112 "alterafile=0\0" \
113 "xilinxfile=0\0" \
114 "xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\
115 "fpga load 0 0x41000000 $filesize\0" \
116 "alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\
117 "fpga load 1 0x41000000 $filesize\0" \
118 "env_default=1\0" \
119 "env_check=if test $env_default -eq 1;"\
120 " then setenv env_default 0;saveenv;fi\0"
121
122/*
123 * "update" is a non-standard command that has to be supplied
124 * by external update.c; This is not included in mainline because
125 * it needs non-blocking CFI routines.
126 */
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100127
Tom Rini6a5dccc2022-11-16 13:10:41 -0500128#define CFG_SYS_FPGA_WAIT 1000
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100129
130/* End of user parameters to be customized */
131
132/* Defines memory range for test */
133
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100134/*
135 * Low Level Configuration Settings
136 * (address mappings, register initial values, etc.)
137 * You should know what you are doing if you make changes here.
138 */
139
140/* Base register address */
141
Tom Rini6a5dccc2022-11-16 13:10:41 -0500142#define CFG_SYS_MBAR 0xFC000000 /* Register Base Addrs */
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100143
144/* System Conf. Reg. & System Protection Reg. */
145
Tom Rini6a5dccc2022-11-16 13:10:41 -0500146#define CFG_SYS_SCR 0x0003;
147#define CFG_SYS_SPR 0xffff;
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100148
149/*
150 * Definitions for initial stack pointer and data area (in internal SRAM)
151 */
Tom Rini6a5dccc2022-11-16 13:10:41 -0500152#define CFG_SYS_INIT_RAM_ADDR 0x80000000
153#define CFG_SYS_INIT_RAM_SIZE 0x8000
154#define CFG_SYS_INIT_RAM_CTRL 0x221
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100155
156/*
157 * Start addresses for the final memory configuration
158 * (Set up by the startup code)
159 * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000
160 */
Tom Rinibb4dd962022-11-16 13:10:37 -0500161#define CFG_SYS_SDRAM_BASE 0x40000000
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100162
163/*
164 * Chipselect bank definitions
165 *
166 * CS0 - Flash 32MB (first 16MB)
167 * CS1 - Flash 32MB (second half)
168 * CS2 - FPGA
169 * CS3 - FPGA
170 * CS4 - unused
171 * CS5 - unused
172 */
Tom Rini6a5dccc2022-11-16 13:10:41 -0500173#define CFG_SYS_CS0_BASE 0
174#define CFG_SYS_CS0_MASK 0x00ff0001
175#define CFG_SYS_CS0_CTRL 0x00001fc0
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100176
Tom Rini6a5dccc2022-11-16 13:10:41 -0500177#define CFG_SYS_CS1_BASE 0x01000000
178#define CFG_SYS_CS1_MASK 0x00ff0001
179#define CFG_SYS_CS1_CTRL 0x00001fc0
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100180
Tom Rini6a5dccc2022-11-16 13:10:41 -0500181#define CFG_SYS_CS2_BASE 0x20000000
182#define CFG_SYS_CS2_MASK 0x00ff0001
183#define CFG_SYS_CS2_CTRL 0x0000fec0
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100184
Tom Rini6a5dccc2022-11-16 13:10:41 -0500185#define CFG_SYS_CS3_BASE 0x21000000
186#define CFG_SYS_CS3_MASK 0x00ff0001
187#define CFG_SYS_CS3_CTRL 0x0000fec0
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100188
Tom Rini6a5dccc2022-11-16 13:10:41 -0500189#define CFG_SYS_FLASH_BASE 0x00000000
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100190
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100191/* Reserve 256 kB for Monitor */
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100192
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100193/*
194 * For booting Linux, the board info and command line data
195 * have to be in the first 8 MB of memory, since this is
196 * the maximum mapped by the Linux kernel during initialization ??
197 */
Tom Rini6a5dccc2022-11-16 13:10:41 -0500198#define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + \
Tom Rinibb4dd962022-11-16 13:10:37 -0500199 (CFG_SYS_SDRAM_SIZE << 20))
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100200
201/* FLASH organization */
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100202
Tom Rini6a5dccc2022-11-16 13:10:41 -0500203#define CFG_SYS_FLASH_SIZE 0x2000000
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100204
angelo@sysam.it6312a952015-03-29 22:54:16 +0200205#define LDS_BOARD_TEXT \
206 . = DEFINED(env_offset) ? env_offset : .; \
Simon Glass547cb402017-08-03 12:21:49 -0600207 env/embedded.o(.text*)
angelo@sysam.it6312a952015-03-29 22:54:16 +0200208
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100209/* Cache Configuration */
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100210
Tom Rini6a5dccc2022-11-16 13:10:41 -0500211#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
212 CFG_SYS_INIT_RAM_SIZE - 8)
213#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
214 CFG_SYS_INIT_RAM_SIZE - 4)
215#define CFG_SYS_ICACHE_INV (CF_CACR_CINVA)
216#define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \
Tom Rinibb4dd962022-11-16 13:10:37 -0500217 CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600218 CF_ACR_EN | CF_ACR_SM_ALL)
Tom Rini6a5dccc2022-11-16 13:10:41 -0500219#define CFG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600220 CF_CACR_DCM_P)
221
Wolfgang Wegner406471c2010-01-25 11:27:44 +0100222#endif /* _CONFIG_ASTRO_MCF5373L_H */