blob: f54edf356a2271ac4b7fd4a12ed92d3caa22019b [file] [log] [blame]
Priyanka Jainfd45ca02018-11-28 13:04:27 +00001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
Meenakshi Aggarwal751f7a72020-01-10 20:13:19 +05303 * Copyright 2018,2020 NXP
Priyanka Jainfd45ca02018-11-28 13:04:27 +00004 */
5
6#ifndef __LX2_RDB_H
7#define __LX2_RDB_H
8
9#include "lx2160a_common.h"
10
11/* Qixis */
12#define QIXIS_XMAP_MASK 0x07
13#define QIXIS_XMAP_SHIFT 5
14#define QIXIS_RST_CTL_RESET_EN 0x30
15#define QIXIS_LBMAP_DFLTBANK 0x00
16#define QIXIS_LBMAP_ALTBANK 0x20
17#define QIXIS_LBMAP_QSPI 0x00
18#define QIXIS_RCW_SRC_QSPI 0xff
19#define QIXIS_RST_CTL_RESET 0x31
20#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
21#define QIXIS_RCFG_CTL_RECONFIG_START 0x21
22#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
23#define QIXIS_LBMAP_MASK 0x0f
24#define QIXIS_LBMAP_SD
Meenakshi Aggarwal74bd4992020-01-23 17:55:10 +053025#define QIXIS_LBMAP_EMMC
Priyanka Jainfd45ca02018-11-28 13:04:27 +000026#define QIXIS_RCW_SRC_SD 0x08
Meenakshi Aggarwal74bd4992020-01-23 17:55:10 +053027#define QIXIS_RCW_SRC_EMMC 0x09
Priyanka Jainfd45ca02018-11-28 13:04:27 +000028#define NON_EXTENDED_DUTCFG
29
30/* VID */
31
32#define I2C_MUX_CH_VOL_MONITOR 0xA
33/* Voltage monitor on channel 2*/
34#define I2C_VOL_MONITOR_ADDR 0x63
35#define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2
36#define I2C_VOL_MONITOR_BUS_V_OVF 0x1
37#define I2C_VOL_MONITOR_BUS_V_SHIFT 3
38#define CONFIG_VID_FLS_ENV "lx2160ardb_vdd_mv"
39#define CONFIG_VID
40
41/* The lowest and highest voltage allowed*/
42#define VDD_MV_MIN 775
43#define VDD_MV_MAX 855
44
45/* PM Bus commands code for LTC3882*/
46#define PMBUS_CMD_PAGE 0x0
47#define PMBUS_CMD_READ_VOUT 0x8B
48#define PMBUS_CMD_PAGE_PLUS_WRITE 0x05
49#define PMBUS_CMD_VOUT_COMMAND 0x21
50#define PWM_CHANNEL0 0x0
51
52#define CONFIG_VOL_MONITOR_LTC3882_SET
53#define CONFIG_VOL_MONITOR_LTC3882_READ
54
55/* RTC */
56#define CONFIG_SYS_RTC_BUS_NUM 4
57
58/* MAC/PHY configuration */
59#if defined(CONFIG_FSL_MC_ENET)
60#define CONFIG_MII
61#define CONFIG_ETHPRIME "DPMAC1@xgmii"
62
63#define AQR107_PHY_ADDR1 0x04
64#define AQR107_PHY_ADDR2 0x05
Florin Chiculitad90d5062019-04-22 11:57:47 +030065#define AQR107_IRQ_MASK 0x0C
Priyanka Jainfd45ca02018-11-28 13:04:27 +000066
67#define CORTINA_NO_FW_UPLOAD
68#define CORTINA_PHY_ADDR1 0x0
69#define INPHI_PHY_ADDR1 0x0
70
71#define RGMII_PHY_ADDR1 0x01
72#define RGMII_PHY_ADDR2 0x02
73
74#endif
75
Meenakshi Aggarwal936a68d2018-11-30 22:32:12 +053076/* EMC2305 */
77#define I2C_MUX_CH_EMC2305 0x09
78#define I2C_EMC2305_ADDR 0x4D
79#define I2C_EMC2305_CMD 0x40
80#define I2C_EMC2305_PWM 0x80
81
Priyanka Jainfd45ca02018-11-28 13:04:27 +000082/* EEPROM */
83#define CONFIG_ID_EEPROM
84#define CONFIG_SYS_I2C_EEPROM_NXID
85#define CONFIG_SYS_EEPROM_BUS_NUM 0
86#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
87#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
88#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
89#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
90
91/* Initial environment variables */
92#define CONFIG_EXTRA_ENV_SETTINGS \
Priyanka Jain16744062019-01-24 05:22:18 +000093 EXTRA_ENV_SETTINGS \
Meenakshi Aggarwal751f7a72020-01-10 20:13:19 +053094 "boot_scripts=lx2160ardb_boot.scr\0" \
95 "boot_script_hdr=hdr_lx2160ardb_bs.out\0" \
Priyanka Jain16744062019-01-24 05:22:18 +000096 "BOARD=lx2160ardb\0" \
97 "xspi_bootcmd=echo Trying load from flexspi..;" \
98 "sf probe 0:0 && sf read $load_addr " \
99 "$kernel_start $kernel_size ; env exists secureboot &&" \
100 "sf read $kernelheader_addr_r $kernelheader_start " \
101 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
102 " bootm $load_addr#$BOARD\0" \
103 "sd_bootcmd=echo Trying load from sd card..;" \
104 "mmcinfo; mmc read $load_addr " \
105 "$kernel_addr_sd $kernel_size_sd ;" \
106 "env exists secureboot && mmc read $kernelheader_addr_r "\
107 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
108 " && esbc_validate ${kernelheader_addr_r};" \
Meenakshi Aggarwalbebebab2020-02-19 23:30:45 +0530109 "bootm $load_addr#$BOARD\0" \
110 "sd2_bootcmd=echo Trying load from emmc card..;" \
111 "mmc dev 1; mmcinfo; mmc read $load_addr " \
112 "$kernel_addr_sd $kernel_size_sd ;" \
113 "env exists secureboot && mmc read $kernelheader_addr_r "\
114 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
115 " && esbc_validate ${kernelheader_addr_r};" \
Priyanka Jain16744062019-01-24 05:22:18 +0000116 "bootm $load_addr#$BOARD\0"
Priyanka Jainfd45ca02018-11-28 13:04:27 +0000117
118#include <asm/fsl_secure_boot.h>
119
120#endif /* __LX2_RDB_H */