blob: f6e173d7d53ac7c97ed008994c28469cc0179e27 [file] [log] [blame]
Fabio Estevamebc8fcc2019-12-09 10:43:03 -03001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2016 Freescale Semiconductor, Inc.
4 *
5 * Configuration settings for the Embedded Artists i.MX7ULP COM board.
6 */
7
8#ifndef __MX7ULP_COM_CONFIG_H
9#define __MX7ULP_COM_CONFIG_H
10
11#include <linux/sizes.h>
12#include <asm/arch/imx-regs.h>
13
14#define CONFIG_BOARD_POSTCLK_INIT
15#define CONFIG_SYS_BOOTM_LEN 0x1000000
16
Fabio Estevamebc8fcc2019-12-09 10:43:03 -030017/*
18 * Detect overlap between U-Boot image and environment area in build-time
19 *
20 * CONFIG_BOARD_SIZE_LIMIT = CONFIG_ENV_OFFSET - u-boot-dtb.imx offset
21 * CONFIG_BOARD_SIZE_LIMIT = 768k - 1k = 767k = 785408
22 *
23 * Currently CONFIG_BOARD_SIZE_LIMIT does not handle expressions, so
24 * write the direct value here
25 */
26#define CONFIG_BOARD_SIZE_LIMIT 785408
27#define CONFIG_SYS_MMC_ENV_DEV 0
28#define CONFIG_MMCROOT "/dev/mmcblk0p2"
29#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
30
31/* Using ULP WDOG for reset */
32#define WDOG_BASE_ADDR WDG1_RBASE
33
34#define CONFIG_SYS_HZ_CLOCK 1000000 /* Fixed at 1MHz from TSTMR */
35
36#define CONFIG_INITRD_TAG
37#define CONFIG_CMDLINE_TAG
38#define CONFIG_SETUP_MEMORY_TAGS
39
40/* Size of malloc() pool */
41#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
42
43/* UART */
44#define LPUART_BASE LPUART4_RBASE
45
46/* allow to overwrite serial and ethaddr */
47#define CONFIG_ENV_OVERWRITE
48
49/* Physical Memory Map */
50
51#define PHYS_SDRAM 0x60000000
52#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
53#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
54
55#define CONFIG_LOADADDR 0x60800000
56
57#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M)
58
59#define CONFIG_EXTRA_ENV_SETTINGS \
60 "image=zImage\0" \
61 "console=ttyLP0\0" \
62 "fdt_high=0xffffffff\0" \
63 "initrd_high=0xffffffff\0" \
64 "fdt_file=imx7ulp-com.dtb\0" \
65 "fdt_addr=0x63000000\0" \
66 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
67 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
68 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
69 "mmcargs=setenv bootargs console=${console},${baudrate} " \
70 "root=${mmcroot}\0" \
71 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
72 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
73 "mmcboot=echo Booting from mmc ...; " \
74 "run mmcargs; " \
75 "if run loadfdt; then " \
76 "bootz ${loadaddr} - ${fdt_addr}; " \
77 "fi;\0" \
78
79#define CONFIG_BOOTCOMMAND \
80 "if run loadimage; then " \
81 "run mmcboot; " \
82 "fi; " \
83
84#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
85
86#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
87#define CONFIG_SYS_INIT_RAM_SIZE SZ_256K
88
89#define CONFIG_SYS_INIT_SP_OFFSET \
90 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
91#define CONFIG_SYS_INIT_SP_ADDR \
92 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
93
94#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
95#define CONFIG_CMD_CACHE
96#endif
97
98#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
99#endif /* __CONFIG_H */