blob: b0e9441a48bdaebff69a219c84eed9e2848916dd [file] [log] [blame]
Yuantian Tang473bbc42019-04-10 16:43:35 +08001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2019 NXP
4 */
5
6#ifndef __LS1028A_QDS_H
7#define __LS1028A_QDS_H
8
9#include "ls1028a_common.h"
10
11#define CONFIG_SYS_CLK_FREQ 100000000
12#define CONFIG_DDR_CLK_FREQ 100000000
13#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4)
14
15/* DDR */
16#define CONFIG_DIMM_SLOTS_PER_CTLR 2
17
18#define CONFIG_QIXIS_I2C_ACCESS
Yuantian Tang473bbc42019-04-10 16:43:35 +080019
20/*
21 * QIXIS Definitions
22 */
23#define CONFIG_FSL_QIXIS
24
25#ifdef CONFIG_FSL_QIXIS
26#define QIXIS_BASE 0x7fb00000
27#define QIXIS_BASE_PHYS QIXIS_BASE
28#define CONFIG_SYS_I2C_FPGA_ADDR 0x66
29#define QIXIS_LBMAP_SWITCH 1
30#define QIXIS_LBMAP_MASK 0x0f
31#define QIXIS_LBMAP_SHIFT 5
32#define QIXIS_LBMAP_DFLTBANK 0x00
33#define QIXIS_LBMAP_ALTBANK 0x00
34#define QIXIS_LBMAP_SD 0x00
35#define QIXIS_LBMAP_EMMC 0x00
36#define QIXIS_LBMAP_QSPI 0x00
37#define QIXIS_RCW_SRC_SD 0x8
38#define QIXIS_RCW_SRC_EMMC 0x9
39#define QIXIS_RCW_SRC_QSPI 0xf
40#define QIXIS_RST_CTL_RESET 0x31
41#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
42#define QIXIS_RCFG_CTL_RECONFIG_START 0x21
43#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
44#define QIXIS_RST_FORCE_MEM 0x01
45
46#define CONFIG_SYS_FPGA_CSPR_EXT (0x0)
47#define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
48 CSPR_PORT_SIZE_8 | \
49 CSPR_MSEL_GPCM | \
50 CSPR_V)
51#define CONFIG_SYS_FPGA_AMASK IFC_AMASK(64 * 1024)
52#define CONFIG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \
53 CSOR_NOR_NOR_MODE_AVD_NOR | \
54 CSOR_NOR_TRHZ_80)
55#endif
56
57/* RTC */
58#define CONFIG_SYS_RTC_BUS_NUM 1
59#define I2C_MUX_CH_RTC 0xB
60
61/* Store environment at top of flash */
62#define CONFIG_ENV_SIZE 0x2000
63
64#ifdef CONFIG_SPL_BUILD
65#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
66#else
67#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
68#endif
69
70/* SATA */
71#define CONFIG_SCSI_AHCI_PLAT
72
73#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
74#ifndef CONFIG_CMD_EXT2
75#define CONFIG_CMD_EXT2
76#endif
77#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
78#define CONFIG_SYS_SCSI_MAX_LUN 1
79#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
80 CONFIG_SYS_SCSI_MAX_LUN)
81/* DSPI */
82#ifdef CONFIG_FSL_DSPI
83#define CONFIG_SPI_FLASH_SST
84#define CONFIG_SPI_FLASH_EON
85#endif
86
87#ifndef SPL_NO_ENV
88#undef CONFIG_EXTRA_ENV_SETTINGS
89#define CONFIG_EXTRA_ENV_SETTINGS \
90 "board=ls1028aqds\0" \
91 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
92 "ramdisk_addr=0x800000\0" \
93 "ramdisk_size=0x2000000\0" \
94 "fdt_high=0xffffffffffffffff\0" \
95 "initrd_high=0xffffffffffffffff\0" \
96 "fdt_addr=0x00f00000\0" \
97 "kernel_addr=0x01000000\0" \
98 "scriptaddr=0x80000000\0" \
99 "scripthdraddr=0x80080000\0" \
100 "fdtheader_addr_r=0x80100000\0" \
101 "kernelheader_addr_r=0x80200000\0" \
102 "load_addr=0xa0000000\0" \
103 "kernel_addr_r=0x81000000\0" \
104 "fdt_addr_r=0x90000000\0" \
105 "ramdisk_addr_r=0xa0000000\0" \
106 "kernel_start=0x1000000\0" \
107 "kernelheader_start=0x800000\0" \
108 "kernel_load=0xa0000000\0" \
109 "kernel_size=0x2800000\0" \
110 "kernelheader_size=0x40000\0" \
111 "kernel_addr_sd=0x8000\0" \
112 "kernel_size_sd=0x14000\0" \
113 "kernelhdr_addr_sd=0x4000\0" \
114 "kernelhdr_size_sd=0x10\0" \
115 "console=ttyS0,115200\0" \
116 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
117 BOOTENV \
118 "boot_scripts=ls1028aqds_boot.scr\0" \
119 "boot_script_hdr=hdr_ls1028aqds_bs.out\0" \
120 "scan_dev_for_boot_part=" \
121 "part list ${devtype} ${devnum} devplist; " \
122 "env exists devplist || setenv devplist 1; " \
123 "for distro_bootpart in ${devplist}; do " \
124 "if fstype ${devtype} " \
125 "${devnum}:${distro_bootpart} " \
126 "bootfstype; then " \
127 "run scan_dev_for_boot; " \
128 "fi; " \
129 "done\0" \
130 "scan_dev_for_boot=" \
131 "echo Scanning ${devtype} " \
132 "${devnum}:${distro_bootpart}...; " \
133 "for prefix in ${boot_prefixes}; do " \
134 "run scan_dev_for_scripts; " \
135 "done;" \
136 "\0" \
137 "boot_a_script=" \
138 "load ${devtype} ${devnum}:${distro_bootpart} " \
139 "${scriptaddr} ${prefix}${script}; " \
140 "env exists secureboot && load ${devtype} " \
141 "${devnum}:${distro_bootpart} " \
142 "${scripthdraddr} ${prefix}${boot_script_hdr} " \
143 "&& esbc_validate ${scripthdraddr};" \
144 "source ${scriptaddr}\0" \
145 "sd_bootcmd=echo Trying load from SD ..;" \
146 "mmcinfo; mmc read $load_addr " \
147 "$kernel_addr_sd $kernel_size_sd && " \
148 "env exists secureboot && mmc read $kernelheader_addr_r " \
149 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
150 " && esbc_validate ${kernelheader_addr_r};" \
151 "bootm $load_addr#$board\0" \
152 "emmc_bootcmd=echo Trying load from EMMC ..;" \
153 "mmcinfo; mmc dev 1; mmc read $load_addr " \
154 "$kernel_addr_sd $kernel_size_sd && " \
155 "env exists secureboot && mmc read $kernelheader_addr_r " \
156 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
157 " && esbc_validate ${kernelheader_addr_r};" \
158 "bootm $load_addr#$board\0"
159#endif
160#endif /* __LS1028A_QDS_H */